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    METHOD FOR PRODUCTION OF A SEMICONDUCTOR STRUCTURE
    1.
    发明申请
    METHOD FOR PRODUCTION OF A SEMICONDUCTOR STRUCTURE 审中-公开
    制造半导体结构的方法

    公开(公告)号：WO2004025714A3

    公开(公告)日：2004-05-13

    申请号：PCT/EP0309551

    申请日：2003-08-28

    Applicant: INFINEON TECHNOLOGIES AG ,  GENZ OLIVER ,  KIRCHHOFF MARKUS ,  MACHILL STEFAN ,  REB ALEXANDER ,  SCHMIDT BARBARA ,  STAVREV MOMTCHIL ,  STEGEMANN MAIK ,  WEGE STEPHAN

    Inventor： GENZ OLIVER ,  KIRCHHOFF MARKUS ,  MACHILL STEFAN ,  REB ALEXANDER ,  SCHMIDT BARBARA ,  STAVREV MOMTCHIL ,  STEGEMANN MAIK ,  WEGE STEPHAN

    IPC: H01L21/027 ,  H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/4763 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/8244

    CPC classification number: H01L21/76811 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/3081 ,  H01L21/31144

    Abstract: The invention relates to a method for production of a semiconductor structure, comprising the steps: preparation of a semiconductor substrate (1), generation of a lower first, a middle second and an upper third masking layer (5, 7, 9) on a surface of the semiconductor substrate (1), formation of at least one first window (11, 11a-h) in the upper third masking layer (9), structuring the middle second masking layer (7) using the first window (11, 11a-h) in the upper third masking layer (9) for the transfer of the first window (11, 11a-h), structuring the lower first masking layer (5) using the first window (11, 11a-h) in the middle second masking layer (7) for the transfer of the first window (11, 11a-h), enlarging the first window (11, 11a-h) in the upper third masking layer (9) to form a second window (13, 13a-b) in a maskless process step, restructuring the middle second masking layer (7) using the second window (13, 13a-b) in the upper third masking layer (9) for the transfer of the second window (13, 13a-b), structuring the semiconductor substrate (1), using the structured lower third masking layer (5), restructuring the lower first masking layer (5) using the second window (13, 13a-b) in the middle second masking layer (7) and restructuring the semiconductor substrate (1) using the restructured lower third masking layer (5).

    Abstract translation: 本发明提供了一种半导体结构制造方法，包括以下步骤：提供半导体衬底（1）; 在所述半导体衬底（1）的表面上提供下第一掩膜层，中间第二掩膜层和上第三掩膜层（5,7,9）; 在所述上部第三掩模层（9）中形成至少第一窗口（11,11a-h）; 使用上部第三掩模层（9）中的第一窗口（11,11a-h）图案化中间第二掩模层（7）以传递第一窗口（11,11a-h）; 使用中间第二掩模层（7）中的第一窗口（11,11a-h）构造下部第一掩模层（5）以传送第一窗口（11,11a-h）; 扩大上部第三掩模层（9）中的第一窗口（11,11a-h）以在无掩模工艺步骤中形成第二窗口（13,13a-b）; 使用上部第三掩模层（9）中的第二窗口（13,13a-b）重构中央第二掩模层（7）以传送第二窗口（13,13a-b）; 使用图案化的下第三掩模层（5）图案化半导体衬底（1）; 使用中间第二掩模层（7）中的第二窗口（13,13a-b）重构下部第一掩模层（5）; 以及使用重构的下第三掩模层（5）重构半导体衬底（1）。

    2.
    发明专利
    未知

    公开(公告)号：DE50203431D1

    公开(公告)日：2005-07-21

    申请号：DE50203431

    申请日：2002-10-29

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： ROGALLI MICHAEL ,  REB ALEXANDER ,  VOELKEL LARS ,  STEGEMANN MAIK

    IPC: G03F7/40 ,  H01L21/311 ,  H01L21/3213

    Abstract: The invention relates to a process for the production of a semiconductor apparatus, in which an etch step is carried out after an exposure step using light having a wavelength of 193 nm and a development step, the etch gas used containing an added reactive monomer. As a result, polymerization of the surface and hence sidewall passivation of the photoresist used are achieved.

    8.
    发明专利
    未知

    公开(公告)号：DE10305365B4

    公开(公告)日：2005-02-10

    申请号：DE10305365

    申请日：2003-02-10

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： SCHWALBE GRIT ,  GOLLER KLAUS ,  REB ALEXANDER

    IPC: H01L21/768 ,  H01L23/485 ,  H01L21/283 ,  H01L21/336 ,  H01L21/331

    Abstract: A contact hole is provided in an insulating layer over a substrate surface. The contact hole is filled with a conductive material and a second insulating layer is provided on the first insulating layer and the filled contact hole. An etching mask is used to etch a first recess to expose the conductive material filling the contact hole, and a second recess through the two insulating layers to expose a connection surface. A conductive material is placed in the two recesses to form two contact terminals. An independent claim is included for a device for contacting substrate connections.

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