公开(公告)号：DE59913465D1

公开(公告)日：2006-06-29

申请号：DE59913465

申请日：1999-07-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HANEDER PETER ,  REISINGER HANS ,  STENGL REINHARD ,  BACHHOFER HARALD ,  WENDT HERMANN ,  HOENLEIN WOLFGANG

IPC: H01L21/8247 ,  H01L29/786 ,  G11C11/22 ,  H01L21/8246 ,  H01L27/105 ,  H01L29/49 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792

Abstract: A ferroelectric transistor suitable as a memory element has a first gate intermediate layer and a first gate electrode disposed on the surface of a semiconductor substrate and disposed between source/drain regions. The first gate intermediate layer contains at least one ferroelectric layer. In addition to the first gate intermediate layer, a second gate intermediate layer and a second gate electrode are configured between the source/drain regions. The second gate intermediate layer contains a dielectric layer. The first gate electrode and the second gate electrode are connected to each other via a diode structure.

公开(公告)号：DE59913422D1

公开(公告)日：2006-06-14

申请号：DE59913422

申请日：1999-12-01

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHLOESSER TILL ,  HANEDER PETER

IPC: H01L21/8247 ,  H01L27/115 ,  H01L21/02 ,  H01L21/28 ,  H01L21/8246 ,  H01L27/105 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792

Abstract: The present invention relates to a FEMFET device with a semiconductor substrate and to at least one field effect transistor that is provided in the semiconductor substrate. The field effect transistor has a source area, a drain area, a channel area and a gate stack. The gate stack has at least one ferroelectric layer and at least one thin diffusion barrier layer being arranged between the lowest ferroelectric layer and the semiconductor substrate and being configured in such a way that an out-diffusion of the components of the ferroelectric layer into the semiconductor substrate is essentially prevented.