公开(公告)号：DE102007025658B4

公开(公告)日：2009-04-09

申请号：DE102007025658

申请日：2007-06-01

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHILLING OLIVER

IPC: H01R43/02 ,  H01L21/60 ,  H01L23/49 ,  H01R4/02

Abstract: The contact wire arrangement has two electrically conducting elements, spacers (50) and contact wire (1). The contact wire bonded on the former element in a bonding area, projects away over the spacers and the latter element, and is spaced from the latter element. The spacers are arranged between the latter element and bonding area. An independent claim is also included for a method for manufacturing a contact wire arrangement.

公开(公告)号：DE102004032358B4

公开(公告)日：2006-09-28

申请号：DE102004032358

申请日：2004-07-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHILLING OLIVER

IPC: H01R12/55 ,  H05K7/14

公开(公告)号：DE10048859B4

公开(公告)日：2005-12-15

申请号：DE10048859

申请日：2000-10-02

Applicant: INFINEON TECHNOLOGIES AG ,  EUPEC GMBH & CO KG

Inventor： SCHILLING OLIVER ,  SEIDELMANN HELMUT ,  SCHOLZ DETLEF ,  BAUER JOSEF ,  PORST ALFRED ,  BEUERMANN MAX ,  BARTHELMESS REINER

IPC: H01L23/051 ,  H01L23/48

Abstract: The pressure contact units (11, 12) are designed to produce an essentially symmetrical, uniform and/or homogeneous pressure distribution in the electronic component (20). This is especially so, in the regions (21a, 22a) between the contact surfaces (21, 22).

公开(公告)号：DE102004042367B4

公开(公告)日：2008-07-10

申请号：DE102004042367

申请日：2004-09-01

Applicant: INFINEON TECHNOLOGIES AG

Inventor： NUEBEL THOMAS ,  SCHILLING OLIVER ,  SPANKE REINHOLD

IPC: H01L25/07 ,  H01L23/12 ,  H01L23/36

Abstract: The power semiconductor module (1) has a heat-conducting base plate (11) on which at least three substrates (2, 3, 4, 5, 6, 7) are placed, each substrate supporting at least one power semiconductor component (8, 9) that gives off heat generated during operation. In order to optimize a power semiconductor module of this type with regard to mechanical load and heat dissipation, the substrates (2, 3, 4, 5, 6, 7) are placed on the base plate (11) while being arranged in a single row (12), and pressing devices (15, 16), which are situated close to the substrate, are provided on both longitudinal sides (11a, 11b) of the base plate (11) while being arranged parallel to the row (12). The base plate can be pressed against a cooling surface by the pressing devices.

公开(公告)号：DE102007025658A1

公开(公告)日：2009-01-02

申请号：DE102007025658

申请日：2007-06-01

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHILLING OLIVER

IPC: H01R43/02 ,  H01L21/60 ,  H01L23/49 ,  H01R4/02

Abstract: The contact wire arrangement has two electrically conducting elements, spacers (50) and contact wire (1). The contact wire bonded on the former element in a bonding area, projects away over the spacers and the latter element, and is spaced from the latter element. The spacers are arranged between the latter element and bonding area. An independent claim is also included for a method for manufacturing a contact wire arrangement.

公开(公告)号：DE102004027185B4

公开(公告)日：2008-08-28

申请号：DE102004027185

申请日：2004-06-03

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHILLING OLIVER ,  PASSE THOMAS

IPC: H01L25/07 ,  H01L23/48 ,  H01L23/64 ,  H01L27/02

Abstract: A semiconductor device has first, second, and third connecting leads ( 1, 2, 3 ), whose respective base points ( 1 f, 2 f, 3 f) have centroids ( 1 m, 2 m, 3 m). The connecting leads are arranged wherein an angle (alpha) between a first line drawn between the centroids ( 1 m, 3 m) of the base points ( 1 f, 3 f) of first lead ( 1 ) and third lead ( 3 ) and a second line drawn between the centroids ( 2 m, 3 m) of the base points ( 2 f, 3 f) of second lead ( 2 ) and third lead ( 3 ) is 20° maximum. In addition, a semiconductor module may incorporate two or more semiconductor devices which are connected electrically in parallel.

公开(公告)号：DE10048859A1

公开(公告)日：2002-04-18

申请号：DE10048859

申请日：2000-10-02

Applicant: INFINEON TECHNOLOGIES AG ,  EUPEC GMBH & CO KG

Inventor： SCHILLING OLIVER ,  SEIDELMANN HELMUT ,  SCHOLZ DETLEF ,  BAUER JOSEF ,  PORST ALFRED ,  BEUERMANN MAX ,  BARTHELMESS REINER

IPC: H01L23/051 ,  H01L23/48

Abstract: The pressure contact units (11, 12) are designed to produce an essentially symmetrical, uniform and/or homogeneous pressure distribution in the electronic component (20). This is especially so, in the regions (21a, 22a) between the contact surfaces (21, 22).

公开(公告)号：DE10043921A1

公开(公告)日：2002-03-21

申请号：DE10043921

申请日：2000-09-06

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHILLING OLIVER ,  FERBER GOTTFRIED

IPC: H03K17/0814 ,  H03K17/12 ,  H03K17/56

Abstract: Electronic circuits (101,102) are provided with at least one input load connection (121,122), an output load connection (141,142) and a control connection (161,162). An output compensation connection (13) is provided between the output load connections to keep the output load connections independent from each other while having the same electrical potential within a given time.

公开(公告)号：DE10006505A1

公开(公告)日：2001-08-23

申请号：DE10006505

申请日：2000-02-15

Applicant: INFINEON TECHNOLOGIES AG ,  EUPEC GMBH & CO KG

Inventor： SCHILLING OLIVER ,  ZIMMERMANN WALTER

IPC: H01L23/538 ,  H01L25/07 ,  H01L29/739 ,  H01L23/64 ,  H01L23/492

Abstract: The power semiconductor module has a number of parallel IGBT-chips (2,3) with their emitter conductor paths (4), base conductor paths (5) and collector conductor paths (1) at least partially provided in common, with a slit (12) provided in one of these conductor paths. The conductor paths are applied to a ceramics substrate (10), with the slit provided simultaneous with the formation of the conductor paths, or provided subsequently via an etching process.

公开(公告)号：DE102007052630A1

公开(公告)日：2009-05-14

申请号：DE102007052630

申请日：2007-11-05

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SCHILLING OLIVER

IPC: H01L23/58 ,  H01L23/18 ,  H01L25/07

Abstract: The power semiconductor module has an electrically and thermally conductive base plate (1) and an electrically insulating and thermally conductive substrate (2) arranged on the base plate. The power semiconductor module has a metallization placed on the side of the substrate turned away from the base plate and a temperature sensor (5) enclosed partially by housing (4) and the base plate. The temperature sensor is embedded in a block of an electrically insulating and thermally conductive mass. The thermally conductive mass has plastic and a polymer.