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    1.
    发明专利
    未知

    公开(公告)号：DE102004035080A1

    公开(公告)日：2005-12-29

    申请号：DE102004035080

    申请日：2004-07-20

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： TROVARELLI OCTAVIO ,  BRINTZINGER AXEL ,  UHLENDORF INGO ,  RUCKMICH STEFAN ,  WALLIS DAVID

    IPC: H01L23/12 ,  H01L23/522 ,  H01L23/528

    Abstract: An arrangement reduces the electrical crosstalk on a chip, in particular between adjacent conductors of the redistribution routing and/or between the redistribution routing on the first passivation on the chip and the metallization of the chip. In one aspect, the arrangement reduces the crosstalk between the redistribution wiring on a chip and its metallization and can be realized simply and independently at the front end. This is achieved by at least an additional conductor ( 10 ) being respectively arranged between adjacent conductors of the redistribution routing ( 1 ) and/or at least a second passivation ( 7 ) with a lower dielectric constant of a preferred "cold dielectric" being arranged between the redistribution routing ( 1 ) and the first passivation ( 2 ) on the active region of the chip ( 3 ).

    3.
    发明专利
    未知

    公开(公告)号：DE102004005022B4

    公开(公告)日：2006-02-16

    申请号：DE102004005022

    申请日：2004-01-30

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BRINTZINGER AXEL ,  TROVARELLI OCTAVIO ,  LEIBERG WOLFGANG

    IPC: H01L21/768 ,  H01L23/532 ,  H01L51/10 ,  H05K1/09 ,  H05K3/10 ,  H05K3/24

    Abstract: A method for fabricating a metallic conductor path with copper-nickel-gold layer structure, in which the copper core of the conductor path is electrically deposited on a copper seed layer (4) with a diffusion barrier arranged under it. Initially a dielectric mask (9) is formed so that the mask structure comprises the conductor path being fabricated, followed by extensive application of a copper-seed layer (4) carrying on the structure of the dielectric mask (9). A resist-mask is formed on the copper seed layer (4) by a first lithographic structuring of the positive resist, followed by galvanic deposition of the copper core (3) on the exposed copper seed layer (4). A second lithographic structuring of the resist mask follows, with subsequent application of nickel-gold-layer on the copper core (3) and removal of the resist mask and etching of the diffusion barrier (10) and the copper seed layer (4).

    4.
    发明专利
    未知

    公开(公告)号：DE102004026092A1

    公开(公告)日：2005-12-22

    申请号：DE102004026092

    申请日：2004-05-25

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BRINTZINGER AXEL ,  TROVARELLI OCTAVIO

    IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/60 ,  H01L23/31 ,  H01L23/525

    Abstract: A semiconductor device includes a semiconductor chip with a plurality of bonding pads at an upper surface and a passivation layer overlying the upper surface. A rewiring layer electrically coupling ones of the bonding pads to corresponding ones of a plurality of contact pads. The rewiring layer is formed by forming a first conductor and forming a covering layer of a precious metal over the first conductor. After forming the rewiring layer, a portion of the precious metal is removed from over the first conductor between the contact pads and bonding pads.

    10.
    发明专利
    未知

    公开(公告)号：DE102004005361A1

    公开(公告)日：2005-09-01

    申请号：DE102004005361

    申请日：2004-02-03

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： BRINTZINGER AXEL ,  TROVARELLI OCTAVIO

    IPC: H01L21/44 ,  H01L21/60 ,  H01L21/768 ,  H01L51/10 ,  H05K1/09 ,  H05K3/10 ,  H05K3/24 ,  H05K3/40

    Abstract: A process produces metallic interconnects and contact surfaces on electronic components using a copper-nickel-gold layer structure. The copper core of the interconnects and contact surfaces is deposited by electroplating by means of a first resist mask made from positive resist. The copper core of the interconnects and contact surfaces is surrounded by a nickel-gold layer by means of a second resist mask. The interconnects and contact surfaces are produced by means of two resist masks arranged one on top of the other, in such a way that the copper which forms the core of the interconnect is completely surrounded by the nickel-gold layer, which extends above the copper core, and an adjoining layer that extends beneath the copper core and comprises a diffusion barrier and seed layer.

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