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公开(公告)号:WO2007087406A3
公开(公告)日:2007-11-15
申请号:PCT/US2007002057
申请日:2007-01-24
Applicant: INFINEON TECHNOLOGIES AG , WEBER FRANK
Inventor: WEBER FRANK
CPC classification number: H01L21/306 , H01L21/02203 , H01L21/02238 , H01L21/02258 , H01L21/02304 , H01L21/02359 , H01L21/3105 , H01L21/31662 , H01L21/7682 , H01L21/76826 , H01L21/76832 , H01L21/76834 , Y10S438/958
Abstract: Embodiments of the invention provide a semiconductor device having dielectric material and its method of manufacture. A manufacturing method comprises forming a layer of silicon over a substrate, forming an opening through the layer of silicon, filling the opening with a conductor; and anodically etching the layer of silicon so as to form porous silicon. Embodiments may further include passivating the porous silicon such as by treating its surface with an organometallic compound. Other embodiments of the invention provide a semiconductor device comprising a layer comprising functional devices; and an interconnect structure over the layer, wherein the interconnect structure comprises a porous silicon dielectric. In an embodiment of the invention, the interconnect structure comprises a dual damascene interconnect structure. Other embodiments may include a passivation step after the step of oxidizing the porous silicon.
Abstract translation: 本发明的实施例提供一种具有介电材料的半导体器件及其制造方法。 制造方法包括在衬底上形成硅层,形成通过硅层的开口,用导体填充开口; 并阳极蚀刻硅层以便形成多孔硅。 实施例还可以包括钝化多孔硅,例如通过用有机金属化合物处理其表面。 本发明的其它实施例提供一种半导体器件,其包括包含功能器件的层; 以及在所述层上的互连结构,其中所述互连结构包括多孔硅电介质。 在本发明的实施例中,互连结构包括双镶嵌互连结构。 其它实施方案可以包括在氧化多孔硅的步骤之后的钝化步骤。
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公开(公告)号:DE112007003795B4
公开(公告)日:2018-05-24
申请号:DE112007003795
申请日:2007-01-24
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WEBER FRANK
IPC: H01L21/31 , H01L21/768 , H01L23/532
Abstract: Die Ausführungsformen der Erfindung stellen eine Halbleitereinrichtung, welches ein Dielektrikum aufweist, und sein Herstellungsverfahren bereit. Ein Herstellungsverfahren weist auf ein Bilden einer Siliziumschicht über einem Substrat, ein Bilden einer Öffnung durch die Siliziumschicht, ein Füllen der Öffnung mit einem Leiter und ein anodisches Ätzen der Siliziumschicht zum Erzeugen von porösem Silizium. Die Ausführungsformen können ferner das Passivieren des porösen Siliziums wie durch die Behandlung seiner Oberfläche mit einer organometallischen Verbindung aufweisen. Weitere Ausführungsformen der Erfindung stellen eine Halbleitereinrichtung bereit, welche eine Schicht mit funktionalen Elementen sowie eine Verbindungsstruktur über der Schicht aufweist, wobei die Verbindungsstruktur ein poröses Silizium-Dielektrikum aufweist. In einer Ausführungsform der Erfindung weist die Verbindungsstruktur eine duale Damaszener-Verbindungsstruktur auf. Weitere Ausführungsformen können einen Passivierungsschritt nach dem Schritt der Oxidation des porösen Siliziums aufweisen.
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公开(公告)号:DE112007003795A5
公开(公告)日:2015-04-23
申请号:DE112007003795
申请日:2007-01-24
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WEBER FRANK
IPC: H01L21/31
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公开(公告)号:DE102005040325B4
公开(公告)日:2009-11-26
申请号:DE102005040325
申请日:2005-08-25
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WEBER FRANK
IPC: H01L21/316 , H01L21/3065 , H01L21/3105 , H01L21/312 , H01L21/314
Abstract: A method of repairing damaged low-k dielectric materials is disclosed. Plasma-based processes, which are commonly used in semiconductor device manufacturing, frequently damage carbon-containing, low-k dielectric materials. Upon exposure to moisture, the damaged dielectric material may form silanol groups. In preferred embodiments, a two-step approach converts the silanol to a suitable organic group. The first step includes using a halogenating reagent to convert the silanol to a silicon halide. The second step includes using a derivatization reagent, preferably an organometallic compound, to replace the halide with the suitable organic group. In a preferred embodiment, the halogenating agent includes thionyl chloride and the organometallic compound includes an alkyllithium, preferably methyllithium. In another preferred embodiment, the organometallic compound comprises a Grignard reagent. Embodiments disclosed herein advantageously enable the manufacturer to engineer the density, polarization, and ionization properties of the low-k dielectric material by selective incorporation of the organic group.
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公开(公告)号:DE10326317B4
公开(公告)日:2007-05-10
申请号:DE10326317
申请日:2003-06-11
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WEBER FRANK , FRANKOWSKY GERD
Abstract: The test system (1) has the integrated components arranged in groups on a burn-in board (3), coupled to a testing device (2) having a number of test modules (7) each provided with a testing circuit (8). An adapter element (13) has a coupling device (14) cooperating with a coupling device (15) of the burn-in board and a number of coupling devices (12) cooperating with coupling devices (11) of respective test modules, for allowing each integrated circuit of a group to be tested via one of the test modules. Also included are Independent claims for the following: (a) an adapter element for a test system for integrated components; (b) a burn-in board for a test system for integrated components.
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公开(公告)号:DE102005040325A1
公开(公告)日:2006-05-04
申请号:DE102005040325
申请日:2005-08-25
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WEBER FRANK
IPC: H01L21/312 , C08J7/12 , H01L21/768
Abstract: A method of repairing damaged low-k dielectric materials is disclosed. Plasma-based processes, which are commonly used in semiconductor device manufacturing, frequently damage carbon-containing, low-k dielectric materials. Upon exposure to moisture, the damaged dielectric material may form silanol groups. In preferred embodiments, a two-step approach converts the silanol to a suitable organic group. The first step includes using a halogenating reagent to convert the silanol to a silicon halide. The second step includes using a derivatization reagent, preferably an organometallic compound, to replace the halide with the suitable organic group. In a preferred embodiment, the halogenating agent includes thionyl chloride and the organometallic compound includes an alkyllithium, preferably methyllithium. In another preferred embodiment, the organometallic compound comprises a Grignard reagent. Embodiments disclosed herein advantageously enable the manufacturer to engineer the density, polarization, and ionization properties of the low-k dielectric material by selective incorporation of the organic group.
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公开(公告)号:DE10114291C1
公开(公告)日:2002-09-05
申请号:DE10114291
申请日:2001-03-23
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WEBER FRANK , FAERBER GERRIT , HUEBNER MICHAEL , MOECKEL JENS , FRITZ MARTIN
Abstract: The testing method uses a contact card (40) for application of a test voltage to one of the supply voltage terminals of each of a number of IC chips (12) incorporated in a semiconductor wafer (10) and measurement of the voltage at a second supply voltage terminal of each IC chip, for comparison with the applied voltage, for acceptance or rejection of the IC chip.
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公开(公告)号:DE112007000215T5
公开(公告)日:2008-12-11
申请号:DE112007000215
申请日:2007-01-24
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WEBER FRANK
IPC: H01L21/31 , H01L21/469
Abstract: Embodiments of the invention provide a semiconductor device having dielectric material and its method of manufacture. A manufacturing method comprises forming a layer of silicon over a substrate, forming an opening through the layer of silicon, filling the opening with a conductor; and anodically etching the layer of silicon so as to form porous silicon. Embodiments may further include passivating the porous silicon such as by treating its surface with an organometallic compound. Other embodiments of the invention provide a semiconductor device comprising a layer comprising functional devices; and an interconnect structure over the layer, wherein the interconnect structure comprises a porous silicon dielectric. In an embodiment of the invention, the interconnect structure comprises a dual damascene interconnect structure. Other embodiments may include a passivation step after the step of oxidizing the porous silicon.
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公开(公告)号:DE102005014533A1
公开(公告)日:2006-11-23
申请号:DE102005014533
申请日:2005-03-30
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WEBER FRANK , DUEREGGER REINHARD , RICHARDSON STEPHEN , SILLUP JOSEPH R
Abstract: The transmitter (300) includes a voltage converter (30). This changes an input voltage prepared by the control unit (200) into a given output voltage, for application to the circuit under test (101a - 101n). The voltage converter (303) is constructed as a DC to DC converter. Its energy transmission efficiency is 90%-98%. The tested circuit is a semiconductor component, especially memory, a logic circuit or a communications component. An independent claim is included for the corresponding method.
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公开(公告)号:DE10308064A1
公开(公告)日:2004-09-16
申请号:DE10308064
申请日:2003-02-26
Applicant: INFINEON TECHNOLOGIES AG
Inventor: WEBER FRANK
IPC: B24B37/04 , B24B57/02 , H01L21/302
Abstract: CMP mechanism contains polishing plate (T) with polishing surface (P) and polishing head (C) for holding semiconductor wafer (W) pressed onto surface by polishing head. There is relative motion between polishing surface and head for polishing.Supply appliance (Z) feeds polishing medium (S), via supply line (L) to surface prepared by conditioner (K), which comprises oscillating holder (H) with rotary grinding disc (G). Polishing medium supply line is located on holder. Holder may be orthogonal to movement direction of polishing surface.
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