公开(公告)号：DE10114291C1

公开(公告)日：2002-09-05

申请号：DE10114291

申请日：2001-03-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WEBER FRANK ,  FAERBER GERRIT ,  HUEBNER MICHAEL ,  MOECKEL JENS ,  FRITZ MARTIN

IPC: G01R1/067 ,  G01R31/04 ,  G01R31/28 ,  H01L21/66 ,  H01L21/60

Abstract: The testing method uses a contact card (40) for application of a test voltage to one of the supply voltage terminals of each of a number of IC chips (12) incorporated in a semiconductor wafer (10) and measurement of the voltage at a second supply voltage terminal of each IC chip, for comparison with the applied voltage, for acceptance or rejection of the IC chip.

公开(公告)号：DE10152086B4

公开(公告)日：2007-03-22

申请号：DE10152086

申请日：2001-10-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MOECKEL JENS ,  FAERBER GERRIT ,  FRITZ MARTIN

IPC: H01L21/66 ,  G11C29/00 ,  G11C29/44

公开(公告)号：DE10310140B4

公开(公告)日：2007-05-03

申请号：DE10310140

申请日：2003-03-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PROELL MANFRED ,  FAERBER GERRIT

IPC: G01R31/28 ,  G01R31/3185 ,  G11C29/00 ,  G11C29/56

Abstract: The tester has multiple connection locations (1k to nk) on a carrier substrate (1), arranged in groups (R1 to Rn), and each location is provided with a control connection (CS) for selecting a device for test. The control connections are connected to a control bus (SCAN-1 to SCAN-n). One address and command connection (A/C) is provided for each connection location.

公开(公告)号：DE10310140A1

公开(公告)日：2004-09-16

申请号：DE10310140

申请日：2003-03-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PROELL MANFRED ,  FAERBER GERRIT

IPC: G01R31/28 ,  G01R31/3185 ,  G11C29/56 ,  G11C29/00

Abstract: The tester has multiple connection locations (1k to nk) on a carrier substrate (1), arranged in groups (R1 to Rn), and each location is provided with a control connection (CS) for selecting a device for test. The control connections are connected to a control bus (SCAN-1 to SCAN-n). One address and command connection (A/C) is provided for each connection location.

公开(公告)号：DE10152086A1

公开(公告)日：2003-05-08

申请号：DE10152086

申请日：2001-10-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MOECKEL JENS ,  FAERBER GERRIT ,  FRITZ MARTIN

IPC: G11C29/00 ,  G11C29/44 ,  H01L21/66

Abstract: The method involves separating a connection between a defective device and the supply line, which are arranged on the wafer and connected to common data lines. Applying a test signal to the common line in order to test the remaining devices. The response signals from the common line are then assessed.