公开(公告)号：DE10152088A1

公开(公告)日：2003-11-06

申请号：DE10152088

申请日：2001-10-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FRANZ GUENTHER ,  GAUER DOROTHEA ,  VEUHOFF EBERHARD ,  ZWICKNAGL PETER ,  BAUMEISTER HORST

IPC: H01L21/331 ,  H01L29/20 ,  H01L29/737

Abstract: Production of a bipolar transistor comprises preparing a substrate (100) having a layer sequence consisting of a sub-collector layer (108, 110), a sub-collector etch-stop layer (112), a collector layer and a base layer, etching the layer sequence to expose a section of the etch stop layer, forming an emitter layer, and forming an emitter contact, a collector contact (134, 136) and a base contact.

公开(公告)号：DE10152087A1

公开(公告)日：2003-05-08

申请号：DE10152087

申请日：2001-10-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FRANZ GUENTHER ,  GEISBAUER ANDREAS ,  PLAGMANN JOERN ,  ZWICKNAGL PETER

IPC: H01L21/20 ,  H01L21/331 ,  H01L29/06 ,  H01L29/737 ,  H01L21/335 ,  H01L21/338 ,  H01L29/778

Abstract: Production of a substrate (100) comprises structuring a substrate to form a recess (106) in the substrate surface (104); growing a layer sequence (112) on the structured surface; and planarizing the substrate and/or the layer sequence to expose a layer lying lower in the layer sequence in a region outside of the recess. Preferred Features: A recess having a first section (108) of a first depth and a second section (110) of a second depth is formed in the first step. A protective layer (122) is formed on the layer sequence. Planarizing comprises thinning the substrate and/or the layer sequence.

公开(公告)号：DE10133362A1

公开(公告)日：2003-01-30

申请号：DE10133362

申请日：2001-07-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KELLER WOLFGANG ,  MUELLER JAN-ERIK ,  PFOST MARTIN ,  ZWICKNAGL PETER

IPC: H01L23/367 ,  H01L29/73 ,  H01L23/34 ,  H01L25/07 ,  H01L29/737

Abstract: The invention relates to a transistor cell, characterized in that for the individual transistors of said transistor cell a heat dissipation adapted to the temperature conditions of the cell in operation is provided. Heat dissipation can for example be specifically reduced for the transistors at the edge of a cell which are colder so that they reach the same temperature as the transistors in the center of the cell which are hotter. This can be achieved without substantially increasing the temperature of the hottest transistors.