公开(公告)号：JP2000231535A

公开(公告)日：2000-08-22

申请号：JP32395199

申请日：1999-11-15

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： FLECK ROD G ,  OBERLAENDER KLAUS ,  BAROR GIGY ,  EDER ALFRED ,  NGUYEN LE TRONG

IPC: G06F9/30 ,  G06F12/00 ,  G06F12/06 ,  G06F13/16

Abstract: PROBLEM TO BE SOLVED: To provide a data processing unit which has a coupling unit for data transfer. SOLUTION: This data processing unit is provided with a register file 8 having plural registers, a memory having plural n-bit input/output ports, a coupling unit for connecting the memory to the register file and a memory address and a selection unit 9 for addressing a memory bank. The coupling unit includes at least a bus which forms 1st and 2nd sub buses and has at least 2n-bit bus width, a 1st coupler for selectively connecting each memory bank or register file to one of the sub buses and a 2nd coupler for connecting the register file or a memory bank to the buses.

公开(公告)号：DE69821957T2

公开(公告)日：2004-12-09

申请号：DE69821957

申请日：1998-09-04

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： FLECK G ,  MOLLER H ,  BAROR GIGY

IPC: G06F9/30 ,  G06F9/38

Abstract: There are two pipelines, one for data instructions and the other for address instructions. A unit issues multiple instructions to the pipelines. Two sets of registers are connected to the pipelines respectively. The pipelines process data in parallel.

公开(公告)号：DE69821957D1

公开(公告)日：2004-04-01

申请号：DE69821957

申请日：1998-09-04

Applicant: INFINEON TECHNOLOGIES CORP

Inventor： FLECK G ,  MOLLER H ,  BAROR GIGY

IPC: G06F9/30 ,  G06F9/38

Abstract: There are two pipelines, one for data instructions and the other for address instructions. A unit issues multiple instructions to the pipelines. Two sets of registers are connected to the pipelines respectively. The pipelines process data in parallel.