公开(公告)号：WO2017112076A1

公开(公告)日：2017-06-29

申请号：PCT/US2016/058879

申请日：2016-10-26

Applicant: INTEL CORPORATION

Inventor： AOKI, Russell S. ,  THIBADO, Jonathan W. ,  SMALLEY, Jeffory L. ,  LLAPITAN, David J. ,  BOYD, Thomas A. ,  KOFSTAD, Harvey R. ,  ZIAKAS, Dimitrios ,  YAN, Hongfei

IPC: H01R12/71 ,  H01R4/02 ,  H05K3/32

CPC classification number: H01L23/345 ,  H01L23/49816 ,  H01L23/49822 ,  H05K1/0212 ,  H05K1/141 ,  H05K1/144 ,  H05K3/3436 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2203/176

Abstract: A rework grid array interposer with direct power is described. The interposer has a foundation layer mountable between a motherboard and a package. A heater is embedded in the foundation layer to provide local heat to reflow solder to enable at least one of attachment or detachment of the package. A connector is mounted on the foundation layer and coupled to the heater and to the package to provide a connection path directly with the power supply and not via the motherboard. One type of interposer interfaces with a package having a solderable extension. Another interposer has a plurality of heater zones embedded in the foundation layer.

Abstract translation: 描述了具有直接功率的返工栅格阵列中介层。 内插器具有可安装在主板和封装之间的基础层。 加热器嵌入在基层中以提供局部热量来回流焊料，以使得封装的附接或分离中的至少一个能够进行。 连接器安装在基础层上并连接到加热器和封装，以提供直接与电源连接的连接路径而不是通过主板。 一种类型的内插器与具有可焊接扩展的封装件接合。 另一个插入器具有多个嵌入基础层中的加热器区域。

公开(公告)号：WO2017112136A1

公开(公告)日：2017-06-29

申请号：PCT/US2016/062146

申请日：2016-11-16

Applicant: INTEL CORPORATION

Inventor： HUI, Michael ,  YEE, Rashelle ,  THIBADO, Jonathan ,  CARTER, Daniel P. ,  FERGUSON, Shelby ,  VALPIANI, Anthony P. ,  AOKI, Russell S. ,  CARSTENS, Jonathon Robert ,  JASNIEWSKI, Joseph J. ,  KOFSTAD, Harvey R. ,  BRAZEL, Michael ,  CLACK, Tracy ,  VOGMAN, Viktor ,  WOODCOCK, Penny ,  CEURTER, Kevin J. ,  YAN, Hongfei

IPC: H01L23/34 ,  H01L23/00 ,  H01L23/48 ,  H01L23/498

CPC classification number: H01L23/345 ,  H01L21/4853 ,  H01L21/4871 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0655 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/81908 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2224/45099 ,  H01L2924/00

Abstract: Disclosed herein are integrated circuit (IC) package support structures, and related systems, devices, and methods. In some embodiments, an IC package support structure may include a first heater trace, and a second heater trace, wherein the second heater trace is not conductively coupled the first heater trace in the IC package support structure.

Abstract translation: 这里公开了集成电路（IC）封装支撑结构以及相关的系统，装置和方法。 在一些实施例中，IC封装支撑结构可以包括第一加热器迹线和第二加热器迹线，其中第二加热器迹线不导电地耦合到IC封装支撑结构中的第一加热器迹线。

公开(公告)号：WO2017105728A1

公开(公告)日：2017-06-22

申请号：PCT/US2016/062096

申请日：2016-11-15

Applicant: INTEL CORPORATION

Inventor： AOKI, Russell S. ,  HUI, Michael R. ,  CARSTENS, Jonathon R. ,  BRAZEL, Michael S. ,  CARTER, Daniel P. ,  BOYD, Thomas A. ,  FERGUSON, Shelby A. ,  YEE, Rashelle ,  JASNIEWSKI, Joseph J. ,  KOFSTAD, Harvey R. ,  VALPIANI, Anthony P.

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/522

CPC classification number: H01L24/75 ,  B23K1/0016 ,  B23K3/087 ,  B23K2201/42 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/75253 ,  H01L2224/75703 ,  H01L2224/75754 ,  H01L2224/81139 ,  H01L2224/81234 ,  H01L2924/15311 ,  H05K3/325 ,  H05K3/3436 ,  H05K2201/10303 ,  H05K2201/10318 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2203/166 ,  H05K2203/167 ,  Y02P70/613

Abstract: Embodiments of the present disclosure describe package alignment frames for a local reflow process to attach a semiconductor package to an interposer. The frame may comprise a two frame system. The interposer may be on a mounting table or on a circuit board. The frame may include a body with a rectangular opening dimensioned to receive a semiconductor package to be coupled to the interposer. The frame may be to align a ball grid array of the semiconductor package with pads of the interposer. A second frame may be to receive the first frame and may be to align a ball grid array of the interposer with pads of the circuit board. A single frame may be used to couple a semiconductor package to an interposer and to couple the interposer to a circuit board. Other embodiments may be described and/or claimed.

Abstract translation: 本公开的实施例描述用于局部回流工艺的封装对准框架以将半导体封装附接到插入器。 该框架可以包括两个框架系统。 插入器可以位于安装台上或电路板上。 该框架可以包括具有矩形开口的主体，该主体的尺寸被设计为容纳要被耦合到插入器的半导体封装。 框架可以将半导体封装的球栅阵列与插入器的焊盘对齐。 第二框架可以用于接收第一框架并且可以将插入器的球栅阵列与电路板的焊盘对齐。 可以使用单个框架将半导体封装耦合到插入器并将插入器耦合到电路板。 其他实施例可以被描述和/或要求保护。

公开(公告)号：EP3198635A1

公开(公告)日：2017-08-02

申请号：EP14902341.8

申请日：2014-09-27

Applicant: INTEL Corporation

Inventor： SMALLEY, Jeffory L. ,  SMITH, Susan F. ,  PRAKASH, Mani ,  LIU, Tao ,  BOSAK, Henry C. ,  KOFSTAD, Harvey R. ,  ORTIZ, Almanzo T.

IPC: H01L23/34

CPC classification number: H01L23/3677 ,  H01L23/3675 ,  H01L23/4093 ,  H01L23/4338 ,  H01L25/0655 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first passive heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second passive heat exchanger disposed on the at least one secondary device; at least one first spring operable to apply a force to the first heat exchanger in a direction of the primary device; and at least one second spring operable to apply a force to the second heat exchanger in the direction of the secondary device. A method including placing a passive heat exchanger on a multi-chip package, and deflecting a spring to apply a force in a direction of an at least one secondary device on the package.

Abstract translation: 一种装置，包括以平面阵列耦合到衬底的主器件和至少一个次器件; 第一无源热交换器，所述第一无源热交换器设置在所述主装置上并且在对应于所述至少一个副装置的区域上具有开口; 布置在所述至少一个辅助装置上的第二无源热交换器; 至少一个第一弹簧，其可操作以在所述主装置的方向上向所述第一热交换器施加力; 以及至少一个第二弹簧，所述第二弹簧可操作以在所述次级装置的方向上向所述第二热交换器施加力。 一种方法，包括将无源热交换器放置在多芯片封装上，并且偏转弹簧以在封装上的至少一个次级器件的方向上施加力。

公开(公告)号：EP3198635B1

公开(公告)日：2020-04-15

申请号：EP14902341.8

申请日：2014-09-27

Applicant: INTEL Corporation

Inventor： SMALLEY, Jeffory L. ,  SMITH, Susan F. ,  PRAKASH, Mani ,  LIU, Tao ,  BOSAK, Henry C. ,  KOFSTAD, Harvey R. ,  ORTIZ, Almanzo T.

IPC: H01L23/34 ,  H01L23/40 ,  H01L23/433