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公开(公告)号：WO2021247920A1
公开(公告)日：2021-12-09
申请号：PCT/US2021/035776
申请日：2021-06-03
Applicant: INTEL CORPORATION
Inventor： GORIUS, Aaron , CROCKER, Michael T. , THIBADO, Jonathan W. , ADILETTA, Matthew J. , GULICK, John C. , FREY, Emery E.
IPC: H05K7/20 , H05K7/14 , H05K7/20272 , H05K7/20281 , H05K7/205
Abstract: The system can include a container that contains fluid to provide two phase immersion liquid cooling (2PILC) for a system within the container. The container can enclose a first circuit board with a first side of the first circuit board is conductively coupled to at least one device. The container can enclose a motherboard conductively coupled to a second side of the first circuit board with a first side of the motherboard is conductively coupled to the second side of the first circuit board. Connectors can conductively connect the motherboard with a second circuit board. The second circuit board can include at least four edges and an edge of the motherboard is oriented approximately 90 degrees to an edge of the second circuit board. At least one device can include one or more of: a processor, memory device, accelerator device, or network interface.
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Patent Agency Ranking
公开(公告)号：WO2017112076A1
公开(公告)日：2017-06-29
申请号：PCT/US2016/058879
申请日：2016-10-26
Applicant: INTEL CORPORATION
Inventor： AOKI, Russell S. , THIBADO, Jonathan W. , SMALLEY, Jeffory L. , LLAPITAN, David J. , BOYD, Thomas A. , KOFSTAD, Harvey R. , ZIAKAS, Dimitrios , YAN, Hongfei
CPC classification number: H01L23/345 , H01L23/49816 , H01L23/49822 , H05K1/0212 , H05K1/141 , H05K1/144 , H05K3/3436 , H05K2201/10719 , H05K2201/10734 , H05K2203/176
Abstract: A rework grid array interposer with direct power is described. The interposer has a foundation layer mountable between a motherboard and a package. A heater is embedded in the foundation layer to provide local heat to reflow solder to enable at least one of attachment or detachment of the package. A connector is mounted on the foundation layer and coupled to the heater and to the package to provide a connection path directly with the power supply and not via the motherboard. One type of interposer interfaces with a package having a solderable extension. Another interposer has a plurality of heater zones embedded in the foundation layer.
Abstract translation: 描述了具有直接功率的返工栅格阵列中介层。 内插器具有可安装在主板和封装之间的基础层。 加热器嵌入在基层中以提供局部热量来回流焊料，以使得封装的附接或分离中的至少一个能够进行。 连接器安装在基础层上并连接到加热器和封装，以提供直接与电源连接的连接路径而不是通过主板。 一种类型的内插器与具有可焊接扩展的封装件接合。 另一个插入器具有多个嵌入基础层中的加热器区域。
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公开(公告)号：WO2017209874A1
公开(公告)日：2017-12-07
申请号：PCT/US2017/030104
申请日：2017-04-28
Applicant: INTEL CORPORATION
Inventor： AOKI, Russell S. , SMALLEY, Jeffory L. , THIBADO, Jonathan W.
IPC: H01L25/065 , H01L23/498 , H01L23/00
Abstract: An apparatus is provided which comprises: a processor die; a processor substrate having a region extended away from the processor die, wherein the processor die is mounted on the processor substrate, wherein the extended region has at least one signal interface which is connectable to a top-side connector; and an interposer coupled to the processor substrate and a motherboard.
Abstract translation: 提供了一种装置，其包括：处理器管芯; 具有远离所述处理器裸片延伸的区域的处理器衬底，其中所述处理器裸片安装在所述处理器衬底上，其中所述扩展区域具有至少一个可连接到顶侧连接器的信号接口; 以及耦合到处理器基板和主板的插入器。
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公开(公告)号：WO2017111993A1
公开(公告)日：2017-06-29
申请号：PCT/US2016/035597
申请日：2016-06-02
Applicant: INTEL CORPORATION
Inventor： AOKI, Russell S. , SMALLEY, Jeffory L. , THIBADO, Jonathan W.
CPC classification number: H05K1/0271 , B23K1/0016 , B23K2201/42 , H01L23/49816 , H01L23/49833 , H01L23/49838 , H01L2224/16225 , H01L2924/15311 , H05B1/0233 , H05K1/0212 , H05K1/141 , H05K2201/041 , H05K2201/10378
Abstract: An apparatus is provided which comprises: a processor substrate extended away from a processor die, wherein the processor substrate has at least one signal interface which is connectable to a connector; and an interposer coupled to the processor substrate and a motherboard. Described is an apparatus which comprises: a processor substrate extended away from a processor die, wherein the processor substrate has at least one signal interface; and a motherboard coupled to the processor substrate, wherein the motherboard is configured to have a hole which is large enough to place a connector at least partially in it to couple with the at least one signal interface.
Abstract translation: 提供了一种设备，其包括：远离处理器裸片延伸的处理器衬底，其中所述处理器衬底具有至少一个可连接到连接器的信号接口; 以及耦合到处理器基板和主板的内插器。 描述了一种装置，包括：远离处理器管芯延伸的处理器基板，其中处理器基板具有至少一个信号接口; 以及耦合到所述处理器基板的主板，其中所述主板被构造成具有足够大的孔以将连接器至少部分地放置在所述孔中以与所述至少一个信号接口耦合。
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公开(公告)号：EP4162779A1
公开(公告)日：2023-04-12
申请号：EP21817862.2
申请日：2021-06-03
Applicant: INTEL Corporation
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公开(公告)号：EP3465753A1
公开(公告)日：2019-04-10
申请号：EP17807170.0
申请日：2017-04-28
Applicant: Intel Corporation
Inventor： AOKI, Russell S. , SMALLEY, Jeffory L. , THIBADO, Jonathan W.
IPC: H01L25/065 , H01L23/498 , H01L23/00
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