公开(公告)号：US09627335B2

公开(公告)日：2017-04-18

申请号：US14272535

申请日：2014-05-08

Applicant: Infineon Technologies AG

Inventor： Stephan Henneck ,  Evelyn Napetschnig ,  Daniel Pedone ,  Bernhard Weidgans ,  Simon Faiss ,  Ivan Nikitin

IPC: H01L21/4763 ,  H01L23/00

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L2224/03424 ,  H01L2224/0345 ,  H01L2224/03464 ,  H01L2224/03472 ,  H01L2224/03614 ,  H01L2224/05007 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/05155 ,  H01L2224/05558 ,  H01L2224/05583 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2924/01023

Abstract: A method for processing a semiconductor device in accordance with various embodiments may include: depositing a first metallization layer over a semiconductor workpiece; patterning the first metallization layer; and depositing a second metallization layer over the patterned first metallization layer, wherein depositing the second metallization layer includes an electroless deposition process including immersing the patterned first metallization layer in a metal electrolyte.

公开(公告)号：US20140319688A1

公开(公告)日：2014-10-30

申请号：US14326252

申请日：2014-07-08

Applicant: Infineon Technologies AG

Inventor： Dirk Meinhold ,  Norbert Mais ,  Reimund Engl ,  Hans-Joerg Timme ,  Alfred Vater ,  Stephan Henneck ,  Norbert Urbansky

IPC: H01L23/00 ,  H01L23/532

CPC classification number: H01L23/564 ,  H01L21/7685 ,  H01L21/76852 ,  H01L23/53219 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48824 ,  H01L2224/4911 ,  H01L2924/01015 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/20752

Abstract: In one embodiment, a method of forming a semiconductor device includes forming a metal line over a substrate and depositing an alloying material layer over a top surface of the metal line. The method further includes forming a protective layer by combining the alloying material layer with the metal line.

Abstract translation: 在一个实施例中，形成半导体器件的方法包括在衬底上形成金属线，并在金属线的顶表面上沉积合金材料层。 该方法还包括通过将合金材料层与金属线组合来形成保护层。

公开(公告)号：US20160126197A1

公开(公告)日：2016-05-05

申请号：US14932548

申请日：2015-11-04

Applicant: Infineon Technologies AG

Inventor： Kurt Matoy ,  Dirk Ahlers ,  Ulrike Fastner ,  Petra Fischer ,  Karl-Heinz Gasser ,  Stephan Henneck ,  Stefan Krivec ,  Florian Weilnboeck

IPC: H01L23/00 ,  H01L23/495 ,  H01L29/45 ,  H01L23/31

CPC classification number: H01L23/562 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/32 ,  H01L24/83 ,  H01L29/45 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/40245 ,  H01L2224/8321 ,  H01L2224/83815 ,  H01L2924/014 ,  H01L2924/3511 ,  H01L2924/37001

Abstract: A semiconductor device includes a semiconductor chip having a first main surface and a second main surface. A chip electrode is disposed on the first main surface. The chip electrode includes a first metal layer and wherein the first metal layer is arranged between the semiconductor chip and the second metal layer.

Abstract translation: 半导体器件包括具有第一主表面和第二主表面的半导体芯片。 芯片电极设置在第一主表面上。 芯片电极包括第一金属层，并且其中第一金属层布置在半导体芯片和第二金属层之间。