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    MERGED-MASK MICRO-MACHINING PROCESS
    2.
    发明授权
    MERGED-MASK MICRO-MACHINING PROCESS 有权
    麻省理工学院麻省理工学院ÜBERBLENDETENMASKEN

    公开(公告)号：EP1196788B1

    公开(公告)日：2004-12-22

    申请号：EP00945370.5

    申请日：2000-07-13

    Applicant: Input/Output, Inc.

    Inventor： YU, Lianzhong ,  RIED, Robert, P. ,  GOLDBERG, Howard, D. ,  YU, Duli

    IPC: G01P9/04 ,  G01P15/135 ,  G02B26/00 ,  C23F1/00 ,  G03F7/26 ,  G03F7/00

    CPC classification number: G02B26/0816 ,  B81B2201/042 ,  B81C1/00396 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2203/0109 ,  C23F1/02

    Abstract: The present invention provides merged-mask processes for fabricating micro-machined devices in general and mirrored assemblies for use in optical scanning devices in particular. The process includes (a) providing a substrate having a predetermined thickness; (b) applying a first masking layer on a first portion of the substrate and a second masking layer on a second portion of the substrate, said second masking layer being at least as thick as the first masking layer; (c) etching a portion of the second masking layer to provide a first exposed portion of the substrate; (d) etching the first exposed portion of the substrate to a first depth; (e) etching the second masking layer to provide a second exposed portion of the substrate; and (f) etching simultaneously the first exposed portion of the substrate to a second depth and the second exposed portion of the substrate to a first depth. The process further comprises patterning the first masking layer before applying the second masking layer to provide the second portion of the substrate for etching and etching the first masking layer to expose the second portion of the substrate. The first and second masking layers are applied prior to etching the substrate.

    Abstract translation: 本发明提供了用于一般地制造微机械装置和特别是用于光学扫描装置的镜面组件的合并掩模工艺。 一种制造三维结构的方法，包括：提供衬底，将第一掩蔽材料层施加到所述衬底上，将第二掩蔽材料层施加到所述第一掩模材料的所述层上，将所述第二掩模材料的所述层 掩模材料，将第三掩模材料层施加到未被第二掩模材料的图案化层覆盖的部分上，第三掩模材料的层至少与第一和第二掩模材料的层的组合厚度一样厚 掩模材料，图案化第一和第三掩模材料的层，蚀刻衬底的暴露部分，蚀刻第一和第三掩模材料的层的暴露部分并蚀刻衬底的暴露部分。

    MICRO-MACHINED MIRROR DEVICE
    3.
    发明公开
    MICRO-MACHINED MIRROR DEVICE 有权
    微制造的反射镜器件

    公开(公告)号：EP1200865A1

    公开(公告)日：2002-05-02

    申请号：EP00947273.9

    申请日：2000-07-13

    Applicant: Input Output, Inc.

    Inventor： YU, Duli ,  YU, Lianzhong ,  GOLDBERG, Howard, D. ,  SCHMIDT, Martin, A. ,  RIED, Robert, P.

    IPC: G02B7/182

    CPC classification number: G02B26/0841 ,  G02B7/1821

    Abstract: A micro machined mirror assembly is provided that includes a micro machined top cap (205), mirror (210), and bottom cap (215) mounted onto a ceramic substrate. The micro machined mirror is resiliently supported by a pair of T-shaped hinges and includes travel stops that limit motion of the mirror in the x-, y-, and z-directions. The top and bottom micro machined caps also include travel stops that limit motion of the mirror in the z-direction.

    ACCELEROMETER WITH FOLDED BEAMS
    7.
    发明公开
    ACCELEROMETER WITH FOLDED BEAMS 审中-公开
    具有折叠梁的加速度计

    公开(公告)号：EP1311863A1

    公开(公告)日：2003-05-21

    申请号：EP01948555.6

    申请日：2001-06-21

    Applicant: Input Output, Inc.

    Inventor： SELVAKUMAR, Arjun ,  YU, Duli ,  YU, Lianzhong ,  JONES, Ben, W.

    IPC: G01P15/00

    CPC classification number: G01V1/181 ,  B81B3/0072 ,  B81B7/0016 ,  B81B2201/0235 ,  B81B2203/0109 ,  B81B2203/0163 ,  B81B2203/053 ,  G01P15/0802 ,  G01P15/125 ,  G01P2015/0814

    Abstract: An accelerometer comprising a measuring mass (1405) for detecting acceleration, including a housing having a cavity, one or more spring mass assemblies (1400) positioned within the cavity, wherein each spring mass assembly (1400) includes a support structure (1410), including one or more resilient folded beams (1415a-1415d) coupled to the support structure (1410) and the measuring mass (1405) is coupled to the resilent folded beams (1415a-1415d), wherein one or more electrode patterns are coupled to the spring mass assembly (1400), wherein a top cap wafer, including a top capacitor electrode, is coupled to the measurement mass (1405), and a bottom cap wafer, including a bottom capacitor electrode, is also coupled to measurement mass (1405).

    Abstract translation: 一种包括用于检测加速度的测量质量体（1405）的加速度计，所述测量质量体包括具有空腔的壳体，位于所述空腔内的一个或多个弹簧质量组件（1400），其中每个弹簧质量组件（1400）包括支撑结构（1410） 包括耦合到支撑结构（1410）的一个或多个弹性折叠梁（1415a-1415d），并且测量质量块（1405）耦合到重新调谐折叠梁（1415a-1415d），其中一个或多个电极图案耦合到 弹簧质量组件（1400），其中包括顶部电容器电极的顶盖晶片耦合到测量质量块（1405），并且包括底部电容器电极的底盖晶片也耦合到测量质量块（1405） 。

    MERGED-MASK MICRO-MACHINING PROCESS
    9.
    发明公开
    MERGED-MASK MICRO-MACHINING PROCESS 有权
    跨褪色口罩微机械方法

    公开(公告)号：EP1196788A1

    公开(公告)日：2002-04-17

    申请号：EP00945370.5

    申请日：2000-07-13

    Applicant: Input Output, Inc.

    Inventor： YU, Lianzhong,13906 NE 9th PL ,  RIED, Robert, P. ,  GOLDBERG, Howard, D. ,  YU, Duli

    IPC: G01P9/04 ,  G01P15/135 ,  G02B26/00 ,  C23F1/00 ,  G03F7/26

    CPC classification number: G02B26/0816 ,  B81B2201/042 ,  B81C1/00396 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2203/0109 ,  C23F1/02

    Abstract: The present invention provides merged-mask processes for fabricating micro-machined devices in general and mirrored assemblies for use in optical scanning devices in particular. The process includes (a) providing a substrate having a predetermined thickness; (b) applying a first masking layer on a first portion of the substrate and a second masking layer on a second portion of the substrate, said second masking layer being at least as thick as the first masking layer; (c) etching a portion of the second masking layer to provide a first exposed portion of the substrate; (d) etching the first exposed portion of the substrate to a first depth; (e) etching the second masking layer to provide a second exposed portion of the substrate; and (f) etching simultaneously the first exposed portion of the substrate to a second depth and the second exposed portion of the substrate to a first depth. The process further comprises patterning the first masking layer before applying the second masking layer to provide the second portion of the substrate for etching and etching the first masking layer to expose the second portion of the substrate. The first and second masking layers are applied prior to etching the substrate.

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