公开(公告)号：US20250112140A1

公开(公告)日：2025-04-03

申请号：US18374609

申请日：2023-09-28

Applicant: Intel Corporation

Inventor： Rahul BHURE ,  Mitchell PAGE ,  Joseph PEOPLES ,  Jieying KONG ,  Nicholas S. HAEHN ,  Astitva TRIPATHI ,  Bainye Francoise ANGOUA ,  Yosef KORNBLUTH ,  Daniel ROSALES-YEOMANS ,  Joshua STACEY ,  Aaditya Anand CANDADAI ,  Yonggang Yong LI ,  Tchefor NDUKUM ,  Scott COATNEY ,  Gang DUAN ,  Jesse JONES ,  Srinivas Venkata Ramanuja PIETAMBARAM ,  Dilan SENEVIRATNE ,  Matthew ANDERSON

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/15

Abstract: Embodiments disclosed herein include package substrates with a glass core. In an embodiment, an apparatus comprises a core with a first width, and the core comprises a glass layer. In an embodiment, a via is provided through a thickness of the core, where the via is electrically conductive. In an embodiment, a first layer is provided over the core, where the first layer comprises a second width that is smaller than the first width. In an embodiment, a second layer is provided under the core, where the second layer comprises a third width that is smaller than the first width.

公开(公告)号：US20240173953A1

公开(公告)日：2024-05-30

申请号：US18059993

申请日：2022-11-30

Applicant: Intel Corporation

Inventor： Joshua STACEY ,  Thomas HEATON ,  Dilan SENEVIRATNE

IPC: B32B37/00 ,  B32B37/02 ,  B32B37/06 ,  B32B37/20 ,  B32B37/30

CPC classification number: B32B37/0007 ,  B32B37/02 ,  B32B37/065 ,  B32B37/20 ,  B32B37/30 ,  B32B2038/0076

Abstract: The present disclosure is directed to an apparatus including a first laminating component configured to laminate a dry film onto a substrate using heat, and a focused cure module configured to selectively cure a first portion of the dry film without curing a second portion of the dry film. The first portion forms a perimeter that surrounds the second portion.

公开(公告)号：US20240105476A1

公开(公告)日：2024-03-28

申请号：US17951114

申请日：2022-09-23

Applicant: Intel Corporation

Inventor： Whitney BRYKS ,  Thomas HEATON ,  Joshua STACEY ,  Dilan SENEVIRATNE ,  Cansu ERGENE

IPC: B05C13/02 ,  B05C5/02 ,  B05D1/26

CPC classification number: B05C13/02 ,  B05C5/02 ,  B05D1/26

Abstract: The present disclosure is directed to a coating module including: a coating stage and a plurality of vertical guides configured to perpendicularly extend from the coating stage; a vertical movement mechanism configured to lower a framed panel along the plurality of vertical guides onto the coating stage; an optical alignment tool configured to provide feedback on a lateral alignment between an edge of the coating stage and the framed panel; and a dispensing unit configured to coat a surface of the panel.

公开(公告)号：US20250112136A1

公开(公告)日：2025-04-03

申请号：US18374937

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Bohan SHAN ,  Jesse JONES ,  Zhixin XIE ,  Bai NIE ,  Shaojiang CHEN ,  Joshua STACEY ,  Mitchell PAGE ,  Brandon C. MARIN ,  Jeremy D. ECTON ,  Nicholas S. HAEHN ,  Astitva TRIPATHI ,  Yuqin LI ,  Edvin CETEGEN ,  Jason M. GAMBA ,  Jacob VEHONSKY ,  Jianyong MO ,  Makoyi WATSON ,  Shripad GOKHALE ,  Mine KAYA ,  Kartik SRINIVASAN ,  Haobo CHEN ,  Ziyin LIN ,  Kyle ARRINGTON ,  Jose WAIMIN ,  Ryan CARRAZZONE ,  Hongxia FENG ,  Srinivas Venkata Ramanuja PIETAMBARAM ,  Gang DUAN ,  Dingying David XU ,  Hiroki TANAKA ,  Ashay DANI ,  Praveen SREERAMAGIRI ,  Yi LI ,  Ibrahim EL KHATIB ,  Aaron GARELICK ,  Robin MCREE ,  Hassan AJAMI ,  Yekan WANG ,  Andrew JIMENEZ ,  Jung Kyu HAN ,  Hanyu SONG ,  Yonggang Yong LI ,  Mahdi MOHAMMADIGHALENI ,  Whitney BRYKS ,  Shuqi LAI ,  Jieying KONG ,  Thomas HEATON ,  Dilan SENEVIRATNE ,  Yiqun BAI ,  Bin MU ,  Mohit GUPTA ,  Xiaoying GUO

IPC: H01L23/498 ,  H01L23/15

Abstract: Embodiments disclosed herein include apparatuses with glass core package substrates. In an embodiment, an apparatus comprises a substrate with a first surface and a second surface opposite from the first surface. A sidewall is between the first surface and the second surface, and the substrate comprises a glass layer. In an embodiment, a via is provided through the substrate between the first surface and the second surface, and the via is electrically conductive. In an embodiment, a layer in contact with the sidewall of the substrate surrounds a perimeter of the substrate.

公开(公告)号：US20240092074A1

公开(公告)日：2024-03-21

申请号：US17949276

申请日：2022-09-21

Applicant: Intel Corporation

Inventor： Joshua STACEY ,  Yosef KORNBLUTH ,  Whitney BRYKS

IPC: B32B41/00 ,  B32B37/06 ,  B32B37/08 ,  B32B37/10 ,  H01L21/48

CPC classification number: B32B41/00 ,  B32B37/06 ,  B32B37/08 ,  B32B37/10 ,  H01L21/4846 ,  B32B2309/022 ,  B32B2309/105 ,  B32B2309/12 ,  B32B2309/72 ,  B32B2457/00

Abstract: The present disclosure is directed to a position-controlled lamination tool or press that includes an array or plurality of pressure sensors and an array or plurality of heating/cooling elements or components, which may be coupled together, for preventing or reducing laminating film or material bleed out and improving thickness variation performance. The pressure sensors may provide a controller, which is coupled to the lamination tool, with real-time feedback on any thickness variations across a substrate panel and the controller may adjust the temperature output of the heating and cooling elements to locally modify the viscosity of the laminating material in one or more regions of the substrate panel to either decrease or increase the flowability of the laminating material.

公开(公告)号：US20240079530A1

公开(公告)日：2024-03-07

申请号：US17903126

申请日：2022-09-06

Applicant: Intel Corporation

Inventor： Jacob VEHONSKY ,  Onur OZKAN ,  Vinith BEJUGAM ,  Mao-Feng TSENG ,  Nicholas HAEHN ,  Andrea NICOLAS FLORES ,  Ali LEHAF ,  Benjamin DUONG ,  Joshua STACEY

IPC: H01L33/48 ,  H01L33/00 ,  H01L33/60 ,  H01L33/62

CPC classification number: H01L33/486 ,  H01L33/005 ,  H01L33/60 ,  H01L33/62 ,  H01L2933/0058 ,  H01L2933/0066

Abstract: Embodiments of an integrated circuit (IC) package are disclosed. In some embodiments, the IC package includes a semiconductor die, a glass substrate, and a package substrate. The semiconductor die includes a micro light emitting diode (LED). The semiconductor die is at least partially embedded within the glass substrate and the glass substrate including a through glass via (TGV) embedded in the glass substrate wherein the TGV is electrically coupled to the semiconductor die to provide power to the micro LED. The package substrate that is coupled to the TGV.