公开(公告)号：JPH06222290A

公开(公告)日：1994-08-12

申请号：JP28152693

申请日：1993-11-10

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： BOKU GIYONRIYUU ,  BOKU SHINSHIYOU ,  KIN TOUKIYUU ,  IN KIYOUCHIN ,  BOKU TETSUJIYUN ,  SOU BINKEI

IPC: G02F3/00 ,  B81B3/00 ,  C03C17/36 ,  G02B26/02 ,  G02B27/00 ,  G09F9/37 ,  G09G3/20

Abstract: PURPOSE: To provide a fine pixel plane display which can represent static or dynamic video by using an optical switch, utilizing an electrostatic microactuator manufactured only by a semiconductor process. CONSTITUTION: A shutter-moving element 14 at an arbitrary position in a frame 15 is electrostatically charged in a belt-like shape by applying a select electrode 3 and a signal electrode 2 with voltages which are respectively higher and lower than the voltage of a common electrode 4. When an equilibrium state is reached, the voltage applied to the select line is inverted in polarity, in order and then the electric charges of the select electrode 3 change momentarily, but electric charges which accumulated on the side of the moving element 14 are unable to migrate immediately because of disturbance by the resistance. Consequently, a driving for which moves the moving element 14 to the right is generated, together with a repulsive force between the moving element 14 and select electrode 3, so that the shutter-moving element 14 moves to the right side.

公开(公告)号：JPH08220385A

公开(公告)日：1996-08-30

申请号：JP31283795

申请日：1995-11-30

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： RI JIYOUKAN ,  SHIYU HIROKANE ,  KIN KOUBAN ,  KIN TOUKIYUU

IPC: G02B6/42 ,  H01L33/36 ,  H01L33/44 ,  H01L33/62 ,  H01S5/00

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method for a self-arranging type optical fiber- optical element coupler by which the occurrence of an arranging error in a V groove and a solder bump can be prevented and the optical coupling efficiency of an optical element and optical fiber can be improved. SOLUTION: This manufacturing method is provided with a process of forming a first insulating film 13 and a pair of metallic pads 15 on a surface of a silicon substrate 11, a process of forming a second insulating film 17 on the first insulating film 13 and the metallic pads 15, a process of forming a photosensitive film 19 so that second opening parts 23 are formed in parts corresponding to the respective metallic pads 15 and a first opening part 21 is formed in an intermediate position of the two second opening parts 23, a process of exposing the silicon substrate 11 and the metallic pads 15 by removing the first and the second insulating films 13 and 17 by using the photosensitive film 19 as a mask, a process of forming a V groove 27 in an exposed part of the silicon substrate 11 by using the first and the second insulating films 13 and 17 as a corrosively carving mask after the photosensitive film 19 is removed and a process of forming a solder bump on the metallic pads 15.

公开(公告)号：JPH0778900A

公开(公告)日：1995-03-20

申请号：JP15989494

申请日：1994-07-12

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： KIN TOUKIYUU ,  SOU MINKEI ,  BOKU SEISHIYU ,  KIYOU SHIYOUKIYUU ,  IN KIYOUCHIN ,  BOKU KIYOUMO

IPC: H01L21/52 ,  H01L23/02 ,  H01L23/04 ,  H01L23/28 ,  H01L23/433 ,  H01L23/48 ,  H01L23/495 ,  H01L23/60 ,  H01L23/66

Abstract: PURPOSE: To provide a package structure for improving the high-frequency characteristics of an element, at the same time standardizing the assembly process for mass-production, and reducing the assembly cost of the element, and an element assembly method. CONSTITUTION: An assembly method includes a process for adhering a heat sink 7 to a lead frame 1, a process for eliminating a thermal stress that is generated from a power element chip 9 and the difference in a thermal coefficient of expansion, a process for manufacturing a lead for impedance matching to improve high-frequency characteristics and for shielding noises, and a process for performing plastic molding utilizing epoxy.

公开(公告)号：JPH05188401A

公开(公告)日：1993-07-30

申请号：JP16459592

申请日：1992-06-23

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： KIN TOUKIYUU ,  BOKU GIYONRIYUU ,  BOKU SHINSHIYU ,  BOKU TETSUJIYUN ,  BOKU KIYOUMO

IPC: G02F1/1343 ,  G02F1/1333 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/86 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786

Abstract: PURPOSE: To prevent the degradation in a yield with an increase in size, to lessen the resistance of gate bus lines and to minimize the shorting between wirings from gate insulating films or the intersected parts of the wirings. CONSTITUTION: This process for production includes a stage for producing unit thin-film transistor(TFT) panels on a polyimide supporting base 33 and a stage for aligning and fixing the unit TFT panels in matrix on a glass substrate 17, then electrically connecting and joining the drain bus lines and gate bus lines of the ends of the unit TFT panels to be joined to each other by an ink jet method. The unit TFT panels are constituted by forming gate metals of three layers Cr/Cu/Cr, forming the respective gate bus lines and drain bus lines on the upper and lower surfaces of the polyimide thin films and connecting drain pads and the drain bus lines by a via hole stage.