-
公开(公告)号：JPH08186455A
公开(公告)日：1996-07-16
申请号：JP31719794
申请日：1994-12-20
Applicant: KOREA ELECTRONICS TELECOMM
Inventor： MOU SEIZAI , RI MASASUZU , BOKU KIYOUBO
Abstract: PURPOSE: To obtain a power amplifier that is used for all analog communication and digital communication systems operated at a low power supply voltage. CONSTITUTION: Microstrip lines L1-L10 each having a characteristic impedance of 50 ohms and a variable capacitor are used to adjust a gate bias by analog and digital methods. After obtaining an impedance at each terminal, an output terminal that is in matching with a major frequency and has a low impedance of 2 ohms or below with respect to second and third harmonics is configured. Through the configuration above, the power amplifier is used for analog and digital communication systems by keeping the linearity and attaining a high efficiency characteristic.
-
公开(公告)号：JPH05210577A
公开(公告)日：1993-08-20
申请号：JP23865192
申请日：1992-09-07
Applicant: KOREA ELECTRONICS TELECOMM
Inventor： KIN KIOU , RI MASASUZU , BOKU KIYOUMO , IN KIYOUCHIN , BOKU SHINSHIYU
Abstract: PURPOSE: To provide a semiconductor device in which AN additional outside chip selection controlling circuit is not necessary in order to improve a chip selection terminal and to constitute a simple decoding circuit inside the semiconductor device. CONSTITUTION: A decoding logic circuit 40 equipped with plural chip selection terminal pairs or the like for selecting a single semiconductor element chip corresponding to the logical combination of an extended address is constituted inside the semiconductor element chip or the like. The decoding logic circuit 40 includes inside logic circuits 30 or the like in the same number as that of the selected semiconductor element chips or the like. Also, the decoding logic circuit 40 includes a module selection terminal (cs) for selecting the overall modules. The inside logic circuit 30 includes a first logic designating circuit 10a which maintains a prescribed logical state and a second logical state circuit 10b which maintains the logical state opposite to that of the first logic designating circuit 10a.
-
公开(公告)号：JPH08186485A
公开(公告)日：1996-07-16
申请号：JP31539094
申请日：1994-12-19
Applicant: KOREA ELECTRONICS TELECOMM
Inventor： KIN BINKEN , KIN CHIYUUKAN , KOU INGABU , RI MASASUZU , BOKU KIYOUMO
IPC: H01P1/15 , H03K17/687
Abstract: PURPOSE: To obtain a depletion-type MOSFET switch circuit operated with a positive voltage as to an ultrahigh frequency monolithic integrated circuit to which only a positive power supply voltage is applied. CONSTITUTION: The circuit is provided with a depletion-type 1st MOSFET 201 whose gate receives an input signal and whose drain provides an output of an output signal, a 2nd MOSFET 203 whose source connects to the source of the 1st MOSFET 201 and whose gate connects to an interruption adjustment power supply Vc, and a 3rd MOSFET 205 whose drain connects to the sources of the 1st and 2nd MOSFETs 201, 203, whose source and gate connect respectively to ground and acting like a constant current source.
-
公开(公告)号：JPH08186454A
公开(公告)日：1996-07-16
申请号：JP31719694
申请日：1994-12-20
Applicant: KOREA ELECTRONICS TELECOMM
Inventor： KOU INGABU , KIN BINKEN , KIN CHIYUUKAN , RI MASASUZU , BOKU KIYOUBO
Abstract: PURPOSE: To obtain excellent stability over all frequency bands by overcoming deteriorated stability due to an inductive component of a bonding wire connected externally. CONSTITUTION: In the case that grounding points are unified into one node and connected externally by using a bonding wire 120 in the low noise amplifier having an input matching section consisting of capacitors 101, 102 and an inductor 103 and an output matching section consisting of two MESFETs 104, 113 connected in cascade and a capacitor 117, a capacitor 110 is connected in parallel between the MESFETs 104, 113 to improve the deteriorated stability.
-
-
-
Search Results
4
records
(took 0.036 seconds)
