公开(公告)号：JPH07201889A

公开(公告)日：1995-08-04

申请号：JP30654394

申请日：1994-12-09

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： YOU TENKIYOKU ,  GO OUKI ,  IN KIYOUSHIYOU ,  RI SHINKI ,  BOKU TETSUJIYUN ,  BOKU KIYOUMO

IPC: H01L29/43 ,  H01L21/30 ,  H01L21/338 ,  H01L29/423 ,  H01L29/49 ,  H01L29/812

Abstract: PURPOSE: To simplify the forming process of a fine pattern and a T-shape gate by doubly exposing a photoresist film through the use of an optical stepper, making it the photoresist film of a lower layer, forming the photoresist film of an upper layer on it and applying a metallic film on it. CONSTITUTION: A photoresist film 20 is applied on the semi-insulating GaAs substrate 10. A photomask 30 having an opaque region 31 is arranged on it and the region of a gate is exposed by the exposure of ultraviolet rays. When the region is exposed again in a state in which the photomask is moved for a prescribed distance, the regions which are not exposed are again classified as a region 22 which is not exposed and regions 23 which have been exposed once, and the region except for the regions is the region that has been exposed twice. Thus, a pattern which is finer than the resolution of the applied stepper can be formed in the formation of the fire form, and the form of the T-shape gate can efficiently be formed.

公开(公告)号：JPH0645361A

公开(公告)日：1994-02-18

申请号：JP34486191

申请日：1991-12-26

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： BOKU TETSUJIYUN ,  CHIN KIKAN ,  MOU SEIZAI ,  YOU TENKIYOKU ,  SAI EIKEI ,  KIYOU CHINEI ,  RI KEIKOU ,  RI SHINHI ,  KIN DOUCHIN

IPC: H01L21/22 ,  H01L21/225 ,  H01L21/265 ,  H01L21/285 ,  H01L21/338 ,  H01L29/812

Abstract: PURPOSE: To allow silicon ions within an evaporated silicon thin film to the diffused into a substrate, even by implanting small amounts of low-energy ions and by heat treatment. CONSTITUTION: A method of manufacturing a GaAs metal-semiconductor field effect transistor involves the steps of: forming a silicon layer 2 on a GaAs substrate 1, forming a first photoresist pattern 3 on the silicon layer 2 using a known image inversion method to define an ohmic contact for source/drain electrodes and etching a silicon layer portion excluding the ohmic contact using photolithography, defining a channel region by forming a second photoresist pattern 4 on the substrate 1 after the first photoresist pattern 3 has been removed, and forming a channel region 5 by implanting a prescribed amount of silicon ions Si into the substrate 1, using the second photoresist pattern 4 as a mask.

公开(公告)号：JPH05347317A

公开(公告)日：1993-12-27

申请号：JP34485591

申请日：1991-12-26

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： BOKU TETSUJIYUN ,  CHIN KIKAN ,  MOU SEIZAI ,  YOU TENKIYOKU ,  SAI EIKEI ,  KIYOU CHINEI ,  RI KEIKOU ,  RI SHINHI ,  KIN DOUCHIN

IPC: H01L29/812 ,  H01L21/285 ,  H01L21/338

Abstract: PURPOSE: To improve a resistance characteristic by using a double-layered heat-resistant gate obtained by forming a heat-resistant junction material on the surface of a GaAs substrate and forming a metal having a low resistance on the junction material. CONSTITUTION: N-type impurities 121a are ion-implanted into an active-layer region of a GaAs substrate 121 with the pattern of a photosensitive film 124 as a mask. Next, the photosensitive film 124 is removed, and a silicon layer 122 and a metallic layer 123 are sequentially deposited. Then, a double layer comprising a metal layer 123a and a silicon layer 122a is formed by an etching process. Then, highly concentrated n-type impurities 121b are ion-implanted into a source/drain region, within the active region of the double layer. After the implantation, heat treatment is performed to cause a chemical reaction. By this treatment, a part of the metallic layer 123 in contact with the silicon layer 122 changes into a metallic silicide layer 125. Then, an ohmic electrode 126 is formed, and the device is completed. Thus, the gate has a low resistance.

公开(公告)号：JPH09129653A

公开(公告)日：1997-05-16

申请号：JP31687395

申请日：1995-12-05

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： GO OUKI ,  YOU TENKIYOKU ,  BOKU TETSUJIYUN

IPC: H01L21/28 ,  H01L21/285 ,  H01L21/306 ,  H01L21/336 ,  H01L21/338 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/45 ,  H01L29/78 ,  H01L29/812

Abstract: PROBLEM TO BE SOLVED: To provide a method by which an MESFET(metal semiconductor field effect transistor) having such a T-type gate and LDD(lightly doped drain) structure that can reduce the resistance of a source and at, the same time, can improve the breakdown voltage characteristic of a drain and can reduce the resistance of a gate can be manufactured. SOLUTION: An inverted mesa section 30 is formed at a prescribed part of a channel area 23 formed between a source area 27 and a drain area 28 by utilizing a cap layer 29 and low-concentration source and drain areas 33 and 34 are formed so that the area 34 can become wider than the area 33 by implanting ions into the areas between the source and drain areas 27 and 28 and the channel area 23 at a low concentration with low energy by utilizing the mesa section 30 as a mask and a T-type gate electrode is formed on the surface of the mesa section 30 or in a groove formed by removing the section 30 so that the electrode cannot come into contact with the source and drain areas 33 and 34.