公开(公告)号：WO0203763A3

公开(公告)日：2002-12-27

申请号：PCT/US0120263

申请日：2001-06-26

Applicant: LAM RES CORP ,  NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y

Inventor： NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y

IPC: H05H1/46 ,  B01J3/00 ,  B01J19/08 ,  H01J37/32 ,  H01L21/3065

CPC classification number: H01J37/321

Abstract: 200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.

Abstract translation: 在相同或几何形状相同的真空等离子体处理室中处理200mm和300mm晶片。 对于不同尺寸的晶片，具有不同几何形状的基本上平面的激励线圈通过经由腔室顶部的电介质窗口向等离子体供应电磁场而将腔室中的可电离气体激发成等离子体。 两个线圈都包括与线圈的中心点同轴的多个对称的基本圆形的匝和至少一个相对于线圈中心点不对称的匝。 两个线圈都包括四匝，r.f. 励磁被施加到最靠近线圈中心点的转弯处。 离中心点第三远的转弯在用于200毫米晶圆的线圈中是不对称的。 最接近线圈中心点的两匝在用于300毫米晶圆的线圈中是不对称的。

公开(公告)号：WO2008147756A3

公开(公告)日：2009-01-29

申请号：PCT/US2008064159

申请日：2008-05-19

Applicant: LAM RES CORP ,  CHO SANGJUN ,  CHOI TOM ,  HAN TAEJOON ,  KANG SEAN ,  GOPALADASU PRABHAKARA ,  YEN BI-MING

Inventor： CHO SANGJUN ,  CHOI TOM ,  HAN TAEJOON ,  KANG SEAN ,  GOPALADASU PRABHAKARA ,  YEN BI-MING

IPC: H01L21/3065 ,  H01L21/027

CPC classification number: H01L21/3081 ,  G03F7/427 ,  H01L21/31138 ,  H01L21/32139

Abstract: A method for etching features in a silicon layer is provided. A hard mask layer is formed over the silicon layer. A photoresist layer is formed over the hard mask layer. The hard mask layer is opened. The photoresist layer is stripped by providing a stripping gas; forming a plasma with the stripping gas by providing a high frequency RF power and a low frequency RF power, wherein the low frequency RF power has a power less than 50 watts; and stopping the stripping gas when the photoresist layer is stripped. The opening the hard mask layer and the stripping the photoresist layer are performed in a same chamber.

Abstract translation: 提供了一种用于蚀刻硅层中的特征的方法。 在硅层上形成硬掩模层。 在硬掩模层上形成光致抗蚀剂层。 打开硬掩模层。 通过提供剥离气体来剥离光致抗蚀剂层; 通过提供高频RF功率和低频RF功率与剥离气体形成等离子体，其中低频RF功率具有小于50瓦的功率; 并且当剥离光致抗蚀剂层时停止剥离气体。 打开硬掩模层和剥离光致抗蚀剂层在相同的室中进行。

公开(公告)号：WO0175958A3

公开(公告)日：2002-01-03

申请号：PCT/US0108618

申请日：2001-03-16

Applicant: LAM RES CORP ,  NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y ,  COLLISON WENLI

Inventor： NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y ,  COLLISON WENLI

IPC: H05H1/46 ,  H01L21/3065 ,  H01L21/3213 ,  H01J37/32

CPC classification number: H01J37/32642 ,  H01L21/32137

Abstract: An apparatus and method for consecutively processing a series of semiconductor substrates with minimal plasma etch rate variation following cleaning with fluorine- containing gas and/or seasoning of the plasma etch chamber. The method includes steps of (a) placing a semiconductor substrate on a substrate support in a plasma etching chamber, (b) maintaining a vacuum in the chamber, (c) etching an exposed surface of the substrate by supplying an etching gas to the chamber and energizing the etching gas to form a plasma in the chamber, (d) removing the substrate from the chamber; and (e) consecutively etching additional substrates in the chamber by repeating steps (a-d), the etching step being carried out by minimizing a recombination rate of H and Br on a silicon carbide edge ring surrounding the substrate at a rate sufficient to offset a rate at which Br is consumed across the substrate. The method can be carried out using pure HBr or combination of HBr with other gases.

Abstract translation: 一种用于在用含氟气体清洁和/或等离子体蚀刻室的调节之后以最小等离子体蚀刻速率变化连续处理一系列半导体衬底的装置和方法。 该方法包括以下步骤：（a）将半导体衬底放置在等离子体蚀刻室中的衬底支撑件上，（b）在室中保持真空，（c）通过向腔室中提供蚀刻气体来蚀刻衬底的暴露表面 并激励蚀刻气体以在腔室中形成等离子体，（d）从腔室中移除基底; 并且（e）通过重复步骤（ad）连续地蚀刻腔室中的附加衬底，蚀刻步骤通过使围绕衬底的碳化硅边缘环上的H和Br的复合速率以足以抵消速率 其中Br在基底上被消耗。 该方法可以使用纯HBr或HBr与其他气体的组合进行。

公开(公告)号：JP2008060565A

公开(公告)日：2008-03-13

申请号：JP2007213685

申请日：2007-08-20

Applicant: Lam Res Corp ,  ラム リサーチ コーポレーションLam Research Corporation

Inventor： KANG SEAN S ,  CHO SANG JUN ,  CHOI TOM ,  HAN TAEJOON

IPC: H01L21/3065 ,  H01L21/768

CPC classification number: H01L21/76808

Abstract: PROBLEM TO BE SOLVED: To provide a method for forming a dual damascene feature in a porous low k dielectric layer. SOLUTION: A via is formed in a porous low k dielectric layer. An organic planarizing layer is formed on the porous low k dielectric layer in a way that the organic layer fills the via. A photoresist mask is formed on the organic planarizing layer. A damascene feature is etched in the organic planarizing layer through a process for supplying CO 2 containing etching gas and generating plasma to etch the planarizing layer from the CO 2 containing etching gas. A trench is formed within the porous low k dielectric layer by employing the organic planarizing layer as a mask. The organic planarizing layer is peeled off. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种在多孔低k电介质层中形成双镶嵌特征的方法。 解决方案：通孔形成在多孔低k电介质层中。 在有机层填充通孔的方式在多孔低k电介质层上形成有机平坦化层。 在有机平坦化层上形成光致抗蚀剂掩模。 通过用于提供含有蚀刻气体的CO 2 并产生等离子体的方法，在有机平坦化层中蚀刻镶嵌特征，以从含有CO 2 SB的含蚀刻气体蚀刻平坦化层。 通过使用有机平坦化层作为掩模，在多孔低k电介质层内形成沟槽。 剥离有机平坦化层。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：WO2008147756A4

公开(公告)日：2009-07-09

申请号：PCT/US2008064159

申请日：2008-05-19

Applicant: LAM RES CORP ,  CHO SANGJUN ,  CHOI TOM ,  HAN TAEJOON ,  KANG SEAN ,  GOPALADASU PRABHAKARA ,  YEN BI-MING

Inventor： CHO SANGJUN ,  CHOI TOM ,  HAN TAEJOON ,  KANG SEAN ,  GOPALADASU PRABHAKARA ,  YEN BI-MING

IPC: H01L21/3065 ,  H01L21/027

CPC classification number: H01L21/3081 ,  G03F7/427 ,  H01L21/31138 ,  H01L21/32139

Abstract: A method for etching features in a silicon layer is provided. A hard mask layer is formed over the silicon layer. A photoresist layer is formed over the hard mask layer. The hard mask layer is opened. The photoresist layer is stripped by providing a stripping gas; forming a plasma with the stripping gas by providing a high frequency RF power and a low frequency RF power, wherein the low frequency RF power has a power less than 50 watts; and stopping the stripping gas when the photoresist layer is stripped. The opening the hard mask layer and the stripping the photoresist layer are performed in a same chamber.

Abstract translation: 提供了一种用于蚀刻硅层中的特征的方法。 在硅层上形成硬掩模层。 在硬掩模层上形成光致抗蚀剂层。 硬掩模层被打开。 通过提供汽提气体来剥离光致抗蚀剂层; 通过提供高频RF功率和低频RF功率形成具有剥离气体的等离子体，其中低频RF功率具有小于50瓦的功率; 并且当光致抗蚀剂层被剥离时停止剥离气体。 在同一腔室中进行硬掩模层的开口和光刻胶层的剥离。

公开(公告)号：WO0203763B1

公开(公告)日：2003-03-13

申请号：PCT/US0120263

申请日：2001-06-26

Applicant: LAM RES CORP ,  NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y

Inventor： NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y

IPC: H05H1/46 ,  B01J3/00 ,  B01J19/08 ,  H01J37/32 ,  H01L21/3065

CPC classification number: H01J37/321

Abstract: 200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.

Abstract translation: 200mm和300mm晶片在相同或具有相同几何形状的真空等离子体处理室中进行处理。 对于不同尺寸的晶片，具有不同几何形状的基本上平面的激励线圈通过在腔室的顶部处的电介质窗口向等离子体提供电磁场，从而激发腔室中的可电离气体到等离子体。 两个线圈包括与线圈的中心点同轴的多个对称的基本圆形的匝和至少一个相对于线圈中心点不对称的匝。 两个线圈包括四圈，r.f. 激励被施加到最接近线圈中心点的转弯。 距离中心点第三远的转弯在用于200 mm晶圆的线圈中是不对称的。 线圈中心点最近的两个转弯在用于300毫米晶圆的线圈中是不对称的。

公开(公告)号：WO0203763A8

公开(公告)日：2002-04-04

申请号：PCT/US0120263

申请日：2001-06-26

Applicant: LAM RES CORP ,  NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y

Inventor： NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y

IPC: H05H1/46 ,  B01J3/00 ,  B01J19/08 ,  H01J37/32 ,  H01L21/3065 ,  H05H1/00

CPC classification number: H01J37/321

Abstract: 200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.

Abstract translation: 200mm和300mm晶片在相同或具有相同几何形状的真空等离子体处理室中进行处理。 对于不同尺寸的晶片，具有不同几何形状的基本上平面的激励线圈通过在腔室的顶部处的电介质窗口向等离子体提供电磁场，从而激发腔室中的可电离气体到等离子体。 两个线圈包括与线圈的中心点同轴的多个对称的基本圆形的匝和至少一个相对于线圈中心点不对称的匝。 两个线圈包括四圈，r.f. 激励被施加到最接近线圈中心点的转弯。 距离中心点第三远的转弯在用于200 mm晶圆的线圈中是不对称的。 在线圈中心点最近的两个转弯在用于300毫米晶圆的线圈中是不对称的。

公开(公告)号：DE60128229D1

公开(公告)日：2007-06-14

申请号：DE60128229

申请日：2001-06-26

Applicant: LAM RES CORP

Inventor： NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y

IPC: H05H1/00 ,  H05H1/46 ,  B01J3/00 ,  B01J19/08 ,  H01J37/32 ,  H01L21/3065

Abstract: 200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.

公开(公告)号：DE60128229T2

公开(公告)日：2007-08-30

申请号：DE60128229

申请日：2001-06-26

Applicant: LAM RES CORP

Inventor： NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y

IPC: H05H1/00 ,  H05H1/46 ,  B01J3/00 ,  B01J19/08 ,  H01J37/32 ,  H01L21/3065

Abstract: 200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.

公开(公告)号：AU4753701A

公开(公告)日：2001-10-15

申请号：AU4753701

申请日：2001-03-16

Applicant: LAM RES CORP

Inventor： NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y ,  COLLISON WENLI

IPC: H05H1/46 ,  H01L21/3065 ,  H01L21/3213 ,  H01J37/32

Abstract: An apparatus and method for consecutively processing a series of semiconductor substrates with minimal plasma etch rate variation following cleaning with fluorine-containing gas and/or seasoning of the plasma etch chamber. The method includes steps of (a) placing a semiconductor substrate on a substrate support in a plasma etching chamber, (b) maintaining a vacuum in the chamber, (c) etching an exposed surface of the substrate by supplying an etching gas to the chamber and energizing the etching gas to form a plasma in the chamber, (d) removing the substrate from the chamber; and (e) consecutively etching additional substrates in the chamber by repeating steps (a-d), the etching step being carried out by minimizing a recombination rate of H and Br on a silicon carbide edge ring surrounding the substrate at a rate sufficient to offset a rate at which Br is consumed across the substrate. The method can be carried out using pure HBr or combination of HBr with other gases.