Abstract:
A system and method for controlling plasma. The system includes a semiconductor chamber comprising a powered electrode, another electrode, and an adjustable coupling to ground circuit. The powered electrode is configured to receive a wafer or substrate. There is at least one grounded electrode configured to generate an electrical connection with the powered electrode. At least one of the grounded electrodes is electrically coupled to the adjustable coupling to ground circuit. The adjustable coupling to ground circuit is configured to modify the impedance of the grounded electrode. The ion energy of the plasma is controlled by the adjustable coupling to ground circuit.
Abstract:
200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.
Abstract:
200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.
Abstract:
200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.
Abstract:
A method and apparatus for detecting the endpoint of a photoresist stripping process. A wafer to be stripped of photoresist is disposed inside a stripping chamber. After substantially all the photoresist is stripped from the wafer, the rate of a reaction of O and NO to form NO2 increases, which increases the intensity of emitted light. A light detecting apparatus detects this increase in light intensity, which signals the endpoint of the photoresist stripping process.
Abstract:
PROBLEM TO BE SOLVED: To provide the method of countermeasure for the change of critical dimension caused by etching of photoresist of an upper layer into lateral direction employing gas containing O 2 in the dry etching of an organic reflection preventing film. SOLUTION: In a semiconductor manufacturing process, an organic reflection preventing film provides selectivity for a lower layer and/or minimizes the etching speed in the lateral direction of photoresist of an upper layer which maintains a critical dimension determined by a photo resist. Accordingly, SO 2 is employed as etchant gas and He, Ar or the like is employed as the carrier gas in the dry etching of the organic reflection preventing film. Another gas such as HBr or the like is added on optional target. This process is useful for the etching of contact opening or beer opening of not more than 0.25 μm upon forming a structure such as a damascene structure or the like. COPYRIGHT: (C)2010,JPO&INPIT
Abstract:
An inductively coupled plasma processing apparatus includes a chamber (100) having a top opening. A window (16) seals the top opening of the chamber, and the window has an inner surface that is exposed to an internal region of the chamber. A window protector (20) for protecting the inner surface of the window is disposed within the chamber. The window protector (20) is configured to prevent conductive etch byproducts from being deposited on the inner surface of the window in the form of a continuous loop. In one alternative embodiment, a plurality of window protectors (20') is affixed to the inner surface of the window. In another embodiment, the window has a plurality of T-shaped or dovetail slots formed therein. In yet another embodiment, a plurality of rectangular slots is formed in the window and a window protector having corresponding slots is mounted against the inner surface of the window.
Abstract:
The amount of RF power supplied to a plasma in a vacuum plasma processing chamber is gradually changed on a preprogrammed basis in response to signals stored in a computer memory. The computer memory stores signals so that other processing chamber parameters (pressure, gas species and gas flow rates) remain constant while the gradual change occurs. The stored signals enable rounded corners, instead of sharp edges, to be etched, e.g., at an intersection of a trench wall and base.
Abstract:
A central controller for use in a semiconductor manufacturing equipment integrates a plurality of controllers with an open architecture allowing real-time communication between the various control loops. The central controller includes at least one central processing unit (cpu) executing high level input output (i/o) and control algorithms and at least one integrated i/o controller providing integrated interface to sensors and control hardware. The integrated i/o controller performs basic i/o and low level control functions and communicates with the CPU through a bus to perform or enable controls of various subsystems of the semiconductor manufacturing equipment. A method for controlling a plurality of sensors and a plurality of control hardware for use in a semiconductor manufacturing equipment loads an application software onto a cpu board that is plugged in a bus. Sensors and control hardware are linked to electrical controllers that are mounted onto a single circuit board which occupies an address block in a memory space of the bus. The single circuit board is then plugged in the bus and the sensors and control hardware are controlled via the application software.
Abstract:
A semiconductor manufacturing process wherein an organic antireflective coating is etched with an O2-free sulfur containing gas which provides selectivity with respect to an underlying layer and/or minimizes the lateral etch rate of an overlying photoresist to maintain critical dimensions defined by the photoresist. The etchant gas can include SO2 and a carrier gas such as Ar or He and optional additions of other gases such as HBr. The process is useful for etching 0.25 micron and smaller contact or via openings in forming structures such as damascene structures.