公开(公告)号：WO0147009A3

公开(公告)日：2002-01-31

申请号：PCT/US0034655

申请日：2000-12-19

Applicant: LAM RES CORP ,  NI TUQIANG ,  COLLISON WENLI

Inventor： NI TUQIANG ,  COLLISON WENLI

IPC: H01L21/3065 ,  H01J37/32 ,  H01L21/027 ,  H01L21/66

CPC classification number: H01J37/32935 ,  H01J37/32963 ,  H01J2237/3342

Abstract: A method and apparatus for detecting the endpoint of a photoresist stripping process. A wafer to be stripped of photoresist is disposed inside a stripping chamber. After substantially all the photoresist is stripped from the wafer, the rate of a reaction of O and NO to form NO2 increases, which increases the intensity of emitted light. A light detecting apparatus detects this increase in light intensity, which signals the endpoint of the photoresist stripping process.

Abstract translation: 一种用于检测光致抗蚀剂剥离工艺的端点的方法和装置。 待剥离光致抗蚀剂的晶片设置在剥离室内。 在从晶片剥离基本上所有的光致抗蚀剂之后，O和NO反应形成NO 2的速率增加，这增加了发射光的强度。 光检测装置检测光强度的增加，其表示光致抗蚀剂剥离工艺的端点。

公开(公告)号：EP1573795A4

公开(公告)日：2007-07-18

申请号：EP03814023

申请日：2003-12-17

Applicant: LAM RES CORP

Inventor： NI TUQIANG ,  COLLISON WENLI

IPC: C23C16/00 ,  H01J37/32 ,  H01L21/3065

CPC classification number: H01L21/67069 ,  H01J37/32082 ,  H01J37/32091 ,  H01J37/32174 ,  H01J37/32577 ,  H01J37/32697 ,  H01J37/32935 ,  H01L21/67017

Abstract: A system and method for controlling plasma. The system includes a semiconductor chamber comprising a powered electrode, another electrode, and an adjustable coupling to ground circuit. The powered electrode is configured to receive a wafer or substrate. There is at least one grounded electrode configured to generate an electrical connection with the powered electrode. At least one of the grounded electrodes is electrically coupled to the adjustable coupling to ground circuit. The adjustable coupling to ground circuit is configured to modify the impedance of the grounded electrode. The ion energy of the plasma is controlled by the adjustable coupling to ground circuit.

Abstract translation: 一种用于控制等离子体的系统和方法。 该系统包括半导体室，其包括供电电极，另一电极和与地电路的可调耦合。 供电电极被配置为接收晶片或衬底。 至少有一个接地电极被配置为产生与供电电极的电连接。 接地电极中的至少一个电耦合到可调节的耦合到接地电路。 可调谐的接地电路被配置为修改接地电极的阻抗。 等离子体的离子能量由可调节的接地电路控制。

公开(公告)号：WO0175958A3

公开(公告)日：2002-01-03

申请号：PCT/US0108618

申请日：2001-03-16

Applicant: LAM RES CORP ,  NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y ,  COLLISON WENLI

Inventor： NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y ,  COLLISON WENLI

IPC: H05H1/46 ,  H01L21/3065 ,  H01L21/3213 ,  H01J37/32

CPC classification number: H01J37/32642 ,  H01L21/32137

Abstract: An apparatus and method for consecutively processing a series of semiconductor substrates with minimal plasma etch rate variation following cleaning with fluorine- containing gas and/or seasoning of the plasma etch chamber. The method includes steps of (a) placing a semiconductor substrate on a substrate support in a plasma etching chamber, (b) maintaining a vacuum in the chamber, (c) etching an exposed surface of the substrate by supplying an etching gas to the chamber and energizing the etching gas to form a plasma in the chamber, (d) removing the substrate from the chamber; and (e) consecutively etching additional substrates in the chamber by repeating steps (a-d), the etching step being carried out by minimizing a recombination rate of H and Br on a silicon carbide edge ring surrounding the substrate at a rate sufficient to offset a rate at which Br is consumed across the substrate. The method can be carried out using pure HBr or combination of HBr with other gases.

Abstract translation: 一种用于在用含氟气体清洁和/或等离子体蚀刻室的调节之后以最小等离子体蚀刻速率变化连续处理一系列半导体衬底的装置和方法。 该方法包括以下步骤：（a）将半导体衬底放置在等离子体蚀刻室中的衬底支撑件上，（b）在室中保持真空，（c）通过向腔室中提供蚀刻气体来蚀刻衬底的暴露表面 并激励蚀刻气体以在腔室中形成等离子体，（d）从腔室中移除基底; 并且（e）通过重复步骤（ad）连续地蚀刻腔室中的附加衬底，蚀刻步骤通过使围绕衬底的碳化硅边缘环上的H和Br的复合速率以足以抵消速率 其中Br在基底上被消耗。 该方法可以使用纯HBr或HBr与其他气体的组合进行。

公开(公告)号：WO0059009A3

公开(公告)日：2001-03-01

申请号：PCT/US0008514

申请日：2000-03-30

Applicant: LAM RES CORP

Inventor： NI TUQUIANG ,  COLLISON WENLI

IPC: H01L21/302 ,  G01B11/00 ,  G02B7/00 ,  H01L21/00 ,  H01L21/205 ,  H01L21/3065 ,  H01L21/31

CPC classification number: G01N21/15

Abstract: An apparatus is provided including a semiconductor processing chamber enclosed by a plurality of walls. Also included is a source of process gas that is required for processing a wafer within the processing chamber. Mounted on one of the walls of the processing chamber is a window. An inlet is positioned adjacent to the window and remains in communication with the processing chamber. The inlet is further coupled to the source of process gas to channel the process gas into the chamber for both preventing the deposition of byproducts on the window and further processing the wafer within the processing chamber.

Abstract translation: 提供了包括由多个壁包围的半导体处理室的装置。 还包括处理处理室内的晶片所需的工艺气体源。 安装在处理室的一个壁上的是一个窗口。 入口邻近窗口定位并保持与处理室连通。 入口还进一步耦合到处理气体源，以将工艺气体引导到室中，以防止在窗口上沉积副产物，并进一步处理处理室内的晶片。

公开(公告)号：DE60043454D1

公开(公告)日：2010-01-14

申请号：DE60043454

申请日：2000-12-19

Applicant: LAM RES CORP

Inventor： NI TUQIANG ,  COLLISON WENLI

IPC: H01L21/3065 ,  H01L21/66 ,  H01J37/32 ,  H01L21/027

Abstract: Methods for detecting the endpoint of a photoresist stripping process provide O for reaction with the photoresist for a wafer to be stripped of photoresist. NO is also supplied for reaction with O not reacted with the photoresist. After substantially all the photoresist is stripped from the wafer, the rate of a reaction of O and NO to form NO 2 increases, which increases the intensity of emitted light. An operation of detecting this increase in light intensity signals the endpoint of the photoresist stripping process.

公开(公告)号：AU5908500A

公开(公告)日：2001-01-31

申请号：AU5908500

申请日：2000-06-29

Applicant: LAM RES CORP

Inventor： NI TUQIANG ,  COLLISON WENLI

IPC: H01L21/302 ,  H01J37/32 ,  H01L21/3065

Abstract: A plasma processing reactor for processing a semiconductor substrate is disclosed. The apparatus includes a chamber. Additionally, the chamber includes a bottom electrode that is configured for holding the substrate. The apparatus further includes a stationary uniformity ring that is configured to surround the periphery of the substrate. Furthermore, the stationary uniformity ring is coupled to a portion of the chamber and disposed above the bottom electrode in a spaced apart relationship to form a vertical space above the bottom electrode. Further, the vertical space is configured to provide room for ingress and egress of the substrate. Also, the stationary uniformity ring has a thickness that substantially reduces diffusion of a first species from outside the stationary uniformity ring toward an edge of the substrate.

公开(公告)号：AT475985T

公开(公告)日：2010-08-15

申请号：AT01920490

申请日：2001-03-16

Applicant: LAM RES CORP

Inventor： NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK ,  COLLISON WENLI

IPC: H01L21/3213 ,  H05H1/46 ,  H01J37/32 ,  H01L21/3065

Abstract: An apparatus and method for consecutively processing a series of semiconductor substrates with minimal plasma etch rate variation following cleaning with fluorine-containing gas and/or seasoning of the plasma etch chamber. The method includes steps of (a) placing a semiconductor substrate on a substrate support in a plasma etching chamber, (b) maintaining a vacuum in the chamber, (c) etching an exposed surface of the substrate by supplying an etching gas to the chamber and energizing the etching gas to form a plasma in the chamber, (d) removing the substrate from the chamber; and (e) consecutively etching additional substrates in the chamber by repeating steps (a-d), the etching step being carried out by minimizing a recombination rate of H and Br on a silicon carbide edge ring surrounding the substrate at a rate sufficient to offset a rate at which Br is consumed across the substrate. The method can be carried out using pure HBr or combination of HBr with other gases.

公开(公告)号：DE60037805T2

公开(公告)日：2009-01-02

申请号：DE60037805

申请日：2000-03-30

Applicant: LAM RES CORP

Inventor： NI TUQUIANG ,  COLLISON WENLI

IPC: H01L21/00 ,  H01L21/302 ,  G01B11/00 ,  G02B7/00 ,  H01L21/205 ,  H01L21/3065 ,  H01L21/31

Abstract: An apparatus is provided including a semiconductor processing chamber enclosed by a plurality of walls. Also included is a source of process gas that is required for processing a wafer within the processing chamber. Mounted on one of the walls of the processing chamber is a window. An inlet is positioned adjacent to the window and remains in communication with the processing chamber. The inlet is further coupled to the source of process gas to channel the process gas into the processing chamber for both preventing the deposition of byproducts on the window and further processing the wafer within the processing chamber. In another embodiment, a source of light, an analysis mechanism, and an optical transmission medium are provided. Such optical transmission medium is coupled between the source of light and the analysis mechanism and is further aligned with the window for directing light into the processing chamber and analyzing the wafer within the processing chamber. The window is configured to reflect the light received from the optical transmission medium at an angle so as to not interfere with light reflected from the wafer within the processing chamber.

公开(公告)号：AU4753701A

公开(公告)日：2001-10-15

申请号：AU4753701

申请日：2001-03-16

Applicant: LAM RES CORP

Inventor： NI TUQIANG ,  TAKESHITA KENJI ,  CHOI TOM ,  LIN FRANK Y ,  COLLISON WENLI

IPC: H05H1/46 ,  H01L21/3065 ,  H01L21/3213 ,  H01J37/32

Abstract: An apparatus and method for consecutively processing a series of semiconductor substrates with minimal plasma etch rate variation following cleaning with fluorine-containing gas and/or seasoning of the plasma etch chamber. The method includes steps of (a) placing a semiconductor substrate on a substrate support in a plasma etching chamber, (b) maintaining a vacuum in the chamber, (c) etching an exposed surface of the substrate by supplying an etching gas to the chamber and energizing the etching gas to form a plasma in the chamber, (d) removing the substrate from the chamber; and (e) consecutively etching additional substrates in the chamber by repeating steps (a-d), the etching step being carried out by minimizing a recombination rate of H and Br on a silicon carbide edge ring surrounding the substrate at a rate sufficient to offset a rate at which Br is consumed across the substrate. The method can be carried out using pure HBr or combination of HBr with other gases.

公开(公告)号：AU2282301A

公开(公告)日：2001-07-09

申请号：AU2282301

申请日：2000-12-19

Applicant: LAM RES CORP

Inventor： NI TUQUIANG ,  COLLISON WENLI

IPC: G03F7/42 ,  H01L21/00 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/306