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    METHOD TO IMPROVE PROFILE CONTROL AND N/P LOADING IN DUAL DOPED GATE APPLICATIONS
    1.
    发明申请
    METHOD TO IMPROVE PROFILE CONTROL AND N/P LOADING IN DUAL DOPED GATE APPLICATIONS 审中-公开
    改进双层门控应用中的配置文件控制和N / P加载的方法

    公开(公告)号：WO2004079783A3

    公开(公告)日：2005-01-20

    申请号：PCT/US2004005944

    申请日：2004-02-26

    Applicant: LAM RES CORP ,  DEL PUPPO HELENE ,  LIN FRANK ,  LEE CHRIS ,  VAHEDI VAHID ,  KAMP THOMAS A ,  MILLER ALAN J

    Inventor： DEL PUPPO HELENE ,  LIN FRANK ,  LEE CHRIS ,  VAHEDI VAHID ,  KAMP THOMAS A ,  MILLER ALAN J

    IPC: H01L21/3213 ,  H01L21/302

    CPC classification number: H01L21/32137

    Abstract: A method for etching a polysilicon gate structure in a plasma etch chamber is provided. The method initiates with defining a pattern protecting a polysilicon film to be etched. Then, a plasma is generated. Next, substantially all of the polysilicon film that is unprotected is etched. Then, a silicon containing gas is introduced and a remainder of the polysilicon film is etched while introducing a silicon containing gas. An etch chamber configured to introduce a silicon containing gas during an etch process is also provided.

    Abstract translation: 提供了一种在等离子体蚀刻室中蚀刻多晶硅栅极结构的方法。 该方法开始于限定保护待蚀刻的多晶硅膜的图案。 然后，产生等离子体。 接下来，蚀刻大部分未被保护的多晶硅膜。 然后，引入含硅气体，并且在引入含硅气体的同时蚀刻剩余的多晶硅膜。 还提供了一种被配置为在蚀刻工艺期间引入含硅气体的蚀刻室。

    METHOD FOR BILAYER RESIST PLASMA ETCH
    4.
    发明申请
    METHOD FOR BILAYER RESIST PLASMA ETCH 审中-公开
    双层电阻等离子体蚀刻方法

    公开(公告)号：WO2006004693A3

    公开(公告)日：2006-05-04

    申请号：PCT/US2005022809

    申请日：2005-06-27

    Applicant: LAM RES CORP ,  NGUYEN WENDY ,  LEE CHRIS

    Inventor： NGUYEN WENDY ,  LEE CHRIS

    IPC: H01B13/00 ,  G03C5/00 ,  H01L21/3213

    CPC classification number: G03F7/405 ,  G03F7/094 ,  H01L21/28123 ,  H01L21/3065 ,  H01L21/31138 ,  H01L21/32137 ,  H01L21/32139

    Abstract: A method for etching a bilayer resist defined over a substrate in a plasma etch chamber is provided. The method initiates with introducing the substrate having a pattern defined on a first layer of the bilayer resist into the etch chamber. Then, SiC1 4 gas flows into the etch chamber. Next, a plasma is struck in the etch chamber while flowing the SiC1 4 gas. Then the bilayer resist is etched.

    Abstract translation: 提供了一种在等离子体蚀刻室中蚀刻限定在衬底上的双层抗蚀剂的方法。 该方法通过将具有限定在双层抗蚀剂的第一层上的图案的基底引入蚀刻室来启动。 然后，SiC 1 H 4气体流入蚀刻室。 接下来，在使SiC1 4气体流动的同时，在蚀刻室中撞击等离子体。 然后刻蚀双层抗蚀剂。

    SELECTIVE ETCH OF FILMS WITH HIGH DIELECTRIC CONSTANT
    5.
    发明申请
    SELECTIVE ETCH OF FILMS WITH HIGH DIELECTRIC CONSTANT 审中-公开
    具有高介电常数的薄膜的选择性蚀刻

    公开(公告)号：WO2005071722B1

    公开(公告)日：2005-11-17

    申请号：PCT/US2005001073

    申请日：2005-01-12

    Applicant: LAM RES CORP ,  RAMALINGAM SHYAM ,  KOTA GOWRI ,  LEE CHRIS

    Inventor： RAMALINGAM SHYAM ,  KOTA GOWRI ,  LEE CHRIS

    IPC: H01L21/28 ,  H01L21/311 ,  H01L29/51

    CPC classification number: H01L29/517 ,  H01L21/28194 ,  H01L21/31116 ,  H01L21/31122

    Abstract: A method for selectively etching a high dielectric constant layer over a silicon substrate is provided. The silicon substrate is placed into an etch chamber. An etchant gas is provided into the etch chamber, where the etchant gas comprises BCl3, an inert diluent, and Cl2, where the flow ratio of the inert diluent to BCl3 is between 2:1 and 1:2, and where the flow ratio of BCl3 to Cl2 is between 2:1 and 20:1. A plasma is generated from the etchant gas to selectively etch the high dielectric constant layer.

    Abstract translation: 提供了一种用于在硅衬底上选择性蚀刻高介电常数层的方法。 将硅衬底放置在蚀刻室中。 蚀刻气体被提供到蚀刻室中，其中蚀刻剂气体包括BCl 3，惰性稀释剂和Cl2，其中惰性稀释剂与BCl 3的流动比在2:1和1:2之间，其中流动比 BCl3至Cl2的含量为2：1至20：1。 从蚀刻剂气体产生等离子体以选择性地蚀刻高介电常数层。

    Method of plasma etching of organic antireflection film
    7.
    发明专利
    Method of plasma etching of organic antireflection film 审中-公开
    有机抗反射膜等离子体蚀刻方法

    公开(公告)号：JP2010219550A

    公开(公告)日：2010-09-30

    申请号：JP2010120922

    申请日：2010-05-26

    Applicant: Lam Res Corp ,  ラム リサーチ コーポレーションLam Research Corporation

    Inventor： NI TUQIANG ,  JIANG WEINAN ,  CHIANG CONAN ,  LIN FRANK Y ,  LEE CHRIS ,  LEE DAI N

    IPC: H01L21/28 ,  H01L21/3065 ,  H01L21/00 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768

    CPC classification number: B81C1/00595 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/67069 ,  H01L21/76807 ,  H01L21/7681 ,  H01L21/76838

    Abstract: PROBLEM TO BE SOLVED: To provide the method of countermeasure for the change of critical dimension caused by etching of photoresist of an upper layer into lateral direction employing gas containing O
    2 in the dry etching of an organic reflection preventing film.
    SOLUTION: In a semiconductor manufacturing process, an organic reflection preventing film provides selectivity for a lower layer and/or minimizes the etching speed in the lateral direction of photoresist of an upper layer which maintains a critical dimension determined by a photo resist. Accordingly, SO
    2 is employed as etchant gas and He, Ar or the like is employed as the carrier gas in the dry etching of the organic reflection preventing film. Another gas such as HBr or the like is added on optional target. This process is useful for the etching of contact opening or beer opening of not more than 0.25 μm upon forming a structure such as a damascene structure or the like.
    COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题：为了提供在使用含有O 2 的气体的干法蚀刻中提供由上层的光致抗蚀剂在横向上蚀刻引起的临界尺寸变化的对策 有机防反射膜。 解决方案：在半导体制造工艺中，有机反射防止膜提供对下层的选择性和/或最小化维持由光致抗蚀剂确定的临界尺寸的上层的光致抗蚀剂的横向蚀刻速度。 因此，在有机反射防止膜的干式蚀刻中，采用SO 2 作为蚀刻剂气体，使用He，Ar等作为载气。 另外的气体如HBr等被添加到可选目标上。 该方法在形成诸如大马士革结构等的结构时，对接触开口或啤酒开口的蚀刻是不大于0.25μm是有用的。 版权所有（C）2010，JPO＆INPIT

    Variable temperature method for tunable electrostatic chuck
    8.
    发明专利
    Variable temperature method for tunable electrostatic chuck 有权
    可变温度保护方法

    公开(公告)号：JP2010187023A

    公开(公告)日：2010-08-26

    申请号：JP2010113921

    申请日：2010-05-18

    Applicant: Lam Res Corp ,  ラム リサーチ コーポレイション

    Inventor： KAMP TOM A ,  GOTTSCHO RICHARD ,  LEE STEVE ,  LEE CHRIS ,  YAMAGUCHI YOKO ,  VAHEDI VAHID ,  EPPLER AARON

    IPC: H01L21/3065 ,  H01L21/00 ,  H01L21/311 ,  H01L21/683 ,  H01L21/768

    CPC classification number: H01L21/67248 ,  H01L21/31116 ,  H01L21/67069 ,  H01L21/6831 ,  H01L21/76804

    Abstract: PROBLEM TO BE SOLVED: To provide an etching method in which etching process controllability is improved. SOLUTION: An etching processor for etching a wafer includes a chuck for holding the wafer and a temperature sensor for informing a temperature of the wafer. The chuck includes a heater controlled by a temperature control system. The temperature sensor is operatively coupled to the temperature control system to keep the temperature of the chuck at a selectable setting temperature. A first setting temperature and a second setting temperature are selected. The wafer is placed on the chuck and set to the first setting temperature. The wafer is then processed at the first setting temperature for a first period of time and at the second setting temperature for a second period of time. COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题：提供蚀刻工艺可控性提高的蚀刻方法。 解决方案：用于蚀刻晶片的蚀刻处理器包括用于保持晶片的卡盘和用于通知晶片温度的温度传感器。 卡盘包括由温度控制系统控制的加热器。 温度传感器可操作地耦合到温度控制系统以将卡盘的温度保持在可选择的设定温度。 选择第一设定温度和第二设定温度。 将晶片放置在卡盘上并设定为第一设定温度。 然后将晶片在第一设定温度下处理第一时间段，并在第二设定温度下处理第二时间段。 版权所有（C）2010，JPO＆INPIT

    METHOD FOR BILAYER RESIST PLASMA ETCH
    10.
    发明专利
    METHOD FOR BILAYER RESIST PLASMA ETCH 未知

    公开(公告)号：IL180025A

    公开(公告)日：2011-06-30

    申请号：IL18002506

    申请日：2006-12-12

    Applicant: LAM RES CORP ,  NGUYEN WENDY ,  LEE CHRIS

    Inventor： NGUYEN WENDY ,  LEE CHRIS

    IPC: H01L21/3213

    Abstract: A method for etching a bilayer resist defined over a substrate in a plasma etch chamber is provided. The method initiates with introducing the substrate having a pattern defined on a first layer of the bilayer resist into the etch chamber. Then SiCl 4 gas flows into the etch chamber. Next, a plasma is struck in the etch chamber while flowing the SiCl 4 gas. Then the bilayer resist is etched.

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