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    ARCHITECTURE FOR GENERAL PURPOSE PROGRAMMABLE SEMICONDUCTOR PROCESSING SYSTEM AND METHODS THEREFOR
    1.
    发明申请
    ARCHITECTURE FOR GENERAL PURPOSE PROGRAMMABLE SEMICONDUCTOR PROCESSING SYSTEM AND METHODS THEREFOR 审中-公开
    一般用途可编程半导体处理系统的结构及其方法

    公开(公告)号：WO2005001893A3

    公开(公告)日：2006-07-27

    申请号：PCT/US2004016414

    申请日：2004-05-24

    Applicant: LAM RES CORP ,  PATRICK ROGER ,  WONG VINCENT ,  HUANG CHUNG HO

    Inventor： PATRICK ROGER ,  WONG VINCENT ,  HUANG CHUNG HO

    IPC: G06F19/00 ,  H01L20060101

    CPC classification number: G05B19/418 ,  G05B2219/32128 ,  G05B2219/35262 ,  G05B2219/45031 ,  H01L21/67276 ,  Y02P90/02 ,  Y02P90/86

    Abstract: A process for creating macros is shown, according to one embodiment of the invention. Initially, a library of macro procedures (102) is created for use in a semi-conductor processing system. For example, in a plasma processing system, this library can consist of tool health checks such as daily and weekly preventative maintenance (PM) qualifications, wet clean and recovery, hardware start-up qualification, chamber matching, and troubleshooting. This library may then be uploaded to the software control program (106) of a semi-conductor processing system. In one embodiment, the semi-conductor processing system comprises a macro engine 108 that interprets macro procedures. In another embodiment, the semi-conductor processing system comprises a macro engine (108) that executes macro procedures. Each of these macro procedures can then be performed in proper sequence by macro engine (108). During operation, the semi-conductor processing system, in turn, examines its state and compares the result to established specifications, or requests that the operator input information. Macro engine 108 may further compare tool data with macro specifications, and may generate and locally store (110) an electronic summary report, a tool performance tracking report, and/or raw data log format. In one embodiment, each report may be in a web-based output format, such as XML or HTML.

    Abstract translation: 根据本发明的一个实施例，示出了用于创建宏的过程。 最初，创建一个用于半导体处理系统的宏程序库（102）。 例如，在等离子体处理系统中，该库可以包括工具健康检查，例如每日和每周预防性维护（PM）资格，湿式清洁和恢复，硬件启动资格，室匹配和故障排除。 然后可以将该库上传到半导体处理系统的软件控制程序（106）。 在一个实施例中，半导体处理系统包括解释宏程序的宏引擎108。 在另一个实施例中，半导体处理系统包括执行宏程序的宏引擎（108）。 然后可以通过宏引擎（108）以适当的顺序执行这些宏程序中的每一个。 在运行过程中，半导体处理系统反过来检查其状态，并将结果与​​已建立的规格进行比较，或要求操作员输入信息。 宏引擎108可以进一步将工具数据与宏规范进行比较，并且可以生成并本地存储（110）电子总结报告，工具性能跟踪报告和/或原始数据日志格式。 在一个实施例中，每个报告可以是基于web的输出格式，例如XML或HTML。

    METHODS AND APPARATUS FOR OPTIMIZING A SUBSTRATE IN A PLASMA PROCESSING SYSTEM
    4.
    发明申请
    METHODS AND APPARATUS FOR OPTIMIZING A SUBSTRATE IN A PLASMA PROCESSING SYSTEM 审中-公开
    用于优化等离子体处理系统中的基板的方法和装置

    公开(公告)号：WO2005048301A3

    公开(公告)日：2006-02-02

    申请号：PCT/US2004035980

    申请日：2004-10-28

    Applicant: LAM RES CORP ,  PATRICK ROGER ,  RICHARDSON BRETT ,  WILLIAMS NORMAN

    Inventor： PATRICK ROGER ,  RICHARDSON BRETT ,  WILLIAMS NORMAN

    IPC: B23K9/02 ,  C23F1/00 ,  H01J7/24 ,  H01L20060101 ,  H01L21/306 ,  H05B31/26

    CPC classification number: H01J37/3299 ,  H01J37/32082 ,  H01J37/321 ,  H01J37/32174 ,  H01J37/32183 ,  H01J37/32935 ,  H03H7/40

    Abstract: An arrangement for processing a semiconductor substrate in a plasma processing system is disclosed. The arrangement includes providing a RF coupling structure having a first terminal and a second terminal, the first terminal being coupled with a first electrical measuring device, the second terminal being coupled with a second electrical measuring device. The arrangement also includes coupling a compensating circuit to the second terminal. The arrangement further includes providing a feedback circuit coupled to receive information from the first electrical measuring device and the second electrical measuring device, an output of the feedback circuit being employed to control the compensating circuit in order to keep a ratio between a first electrical value at the first terminal and a second electrical value at the second terminal substantially at a predefined value.

    Abstract translation: 公开了一种在等离子体处理系统中处理半导体衬底的装置。 该装置包括提供具有第一端子和第二端子的RF耦合结构，第一端子与第一电测量装置耦合，第二端子与第二电测量装置耦合。 该布置还包括将补偿电路耦合到第二端子。 该装置还包括提供耦合以从第一电测量装置和第二电测量装置接收信息的反馈电路，反馈电路的输出被用于控制补偿电路，以便保持第一电气值在 第一端子和第二端子处的第二电气值基本上是预定义的值。

    APPARATUS FOR IMPROVING ETCH UNIFORMITY AND METHODS THEREFOR
    5.
    发明申请
    APPARATUS FOR IMPROVING ETCH UNIFORMITY AND METHODS THEREFOR 审中-公开
    改进ETF均匀性的方法及其方法

    公开(公告)号：WO9913489A3

    公开(公告)日：1999-05-06

    申请号：PCT/US9818264

    申请日：1998-09-01

    Applicant: LAM RES CORP

    Inventor： PATRICK ROGER ,  JONES PHILLIP L

    IPC: H05H1/46 ,  H01J37/32 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/3213

    CPC classification number: H01J37/32431 ,  H01J2237/3343 ,  H01L21/32136

    Abstract: A method in a plasma processing chamber for improving etch uniformity while etching a semiconductor substrate. The method includes placing the semiconductor substrate into a sacrificial substrate holder. The sacrificial substrate holder is configured to present a sacrificial etch portion surrounding the semiconductor substrate to a plasma within the plasma processing chamber to permit the plasma to etch a first surface of the semiconductor substrate and a first surface of the sacrificial etch portion simultaneously. The first surface of the sacrificial etch portion is formed of a material capable of being etched by the plasma. The method further includes positioning the semiconductor substrate and the sacrificial substrate holder into the plasma processing chamber. There is also included striking the plasma from an etchant source gas released into the plasma processing chamber. Additionally, there is included simultaneously etching the first surface of the semiconductor substrate and the first surface of the sacrificial etch portion using the plasma.

    Abstract translation: 等离子体处理室中的方法，用于在蚀刻半导体衬底的同时提高蚀刻均匀性。 该方法包括将半导体衬底放置在牺牲衬底保持器中。 牺牲衬底保持器被配置为将围绕半导体衬底的牺牲蚀刻部分呈现到等离子体处理室内的等离子体，以允许等离子体同时蚀刻半导体衬底的第一表面和牺牲蚀刻部分的第一表面。 牺牲蚀刻部分的第一表面由能够被等离子体蚀刻的材料形成。 该方法还包括将半导体衬底和牺牲衬底保持器定位到等离子体处理室中。 还包括从释放到等离子体处理室中的蚀刻剂源气体冲击等离子体。 此外，还包括使用等离子体同时蚀刻半导体衬底的第一表面和牺牲蚀刻部分的第一表面。

    ELECTRODE ASSEMBLY AND PLASMA PROCESSING CHAMBER UTILIZING THERMALLY CONDUCTIVE GASKET AND O-RINGS
    7.
    发明申请
    ELECTRODE ASSEMBLY AND PLASMA PROCESSING CHAMBER UTILIZING THERMALLY CONDUCTIVE GASKET AND O-RINGS 审中-公开
    电极组件和等离子体加工室，采用导热垫片和O形圈

    公开(公告)号：WO2008156958A3

    公开(公告)日：2009-02-19

    申请号：PCT/US2008064488

    申请日：2008-05-22

    Applicant: LAM RES CORP ,  PATRICK ROGER ,  DHINDSA RAJ ,  BETTENCOURT GREG ,  MARAKHTANOV ALEXEI

    Inventor： PATRICK ROGER ,  DHINDSA RAJ ,  BETTENCOURT GREG ,  MARAKHTANOV ALEXEI

    IPC: H01L21/3065 ,  C23C16/50

    CPC classification number: H05H1/46 ,  H01J37/32541 ,  H01J37/32724

    Abstract: The present invention relates generally to plasma processing and, more particularly, to plasma processing chambers and electrode assemblies used therein. According to one embodiment of the present invention, an electrode assembly is provided comprising a thermal control plate, a silicon-based showerhead electrode, a thermally conductive gasket, and a plurality of o-rings, wherein respective profiles of a frontside of the thermal control plate and a backside of the showerhead electrode cooperate to define a thermal interface. The thermally conductive gasket and the o-rings are positioned along this thermal interface with the o-rings separating the thermally conductive gasket from the showerhead passages such that the gasket is isolated from the showerhead passages. The gasket may facilitate heat transfer across the thermal interface from the showerhead electrode to the thermal control plate.

    Abstract translation: 本发明一般涉及等离子体处理，更具体地，涉及其中使用的等离子体处理室和电极组件。 根据本发明的一个实施例，提供一种电极组件，其包括热控制板，硅基喷头电极，导热衬垫和多个O形环，其中热控制器的前侧的各个轮廓 板和喷头电极的背面配合以限定热界面。 导热垫圈和O形环沿着该热界面定位，其中O形环将导热垫片与喷头通道分开，使得垫圈与喷头通道隔离。 衬垫可以促进从喷头电极到热控制板的热界面的热传递。

    10.
    发明专利
    未知

    公开(公告)号：DE69836857T2

    公开(公告)日：2007-07-05

    申请号：DE69836857

    申请日：1998-04-15

    Applicant: LAM RES CORP

    Inventor： PATRICK ROGER ,  WILLIAMS NORMAN

    IPC: H01J37/32 ,  H05H1/46 ,  H01L21/205 ,  H01L21/302

    Abstract: A plasma processing system includes a plasma reactor, a first power circuit, a second power circuit and a feedback circuit. The first power circuit supplies a first radio frequency (rf) energy to the plasma reactor that is suitable for creating a direct current bias on a workpiece positioned within a plasma chamber. The second power circuit supplies a second rf energy to the plasma reactor that is suitable for striking a plasma within the plasma chamber. The feedback circuit is coupled to control the first power circuit by detecting at least one parameter associated with the first rf energy and providing a feedback control signal to the first power circuit. The first power circuit adjusts the first rf energy so that a level of energy of the ionized particles within the plasma chamber is substantially controlled via the direct current bias created by the first rf energy. A second feedback circuit can also be provided to control the second power circuit so that a level of plasma density within the plasma chamber is substantially controlled.

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