公开(公告)号：WO2006012003A3

公开(公告)日：2006-07-06

申请号：PCT/US2005021098

申请日：2005-06-14

Applicant: LAM RES CORP ,  WIEPKING MARK ,  LYNDAKER BRADFORD J ,  KUTHI ANDRAS ,  FISCHER ANDREAS

Inventor： WIEPKING MARK ,  LYNDAKER BRADFORD J ,  KUTHI ANDRAS ,  FISCHER ANDREAS

IPC: B23K9/00 ,  B23K9/02

CPC classification number: H01J37/32009 ,  H01J37/32082 ,  H01J37/32706

Abstract: A method in a plasma processing system for processing a semiconductor substrate is disclosed. The plasma processing system includes a plasma processing chamber and an electrostatic chuck coupled to a bias compensation circuit. The method includes igniting a plasma in a plasma ignition step. Plasma ignition step is performed while a first bias compensation voltage provided by the bias compensation circuit to the chuck is substantially zero and while a first chamber pressure within the plasma processing chamber is below about 90 mTorr. The method further includes processing the substrate in a substrate-processing step after the plasma is ignited. The substrate-processing step employs a second bias compensation voltage provided by the bias compensation circuit that is higher than the first bias compensation voltage and a second chamber pressure substantially equal to the first chamber pressure.

Abstract translation: 公开了一种用于处理半导体衬底的等离子体处理系统中的方法。 等离子体处理系统包括等离子体处理室和耦合到偏置补偿电路的静电卡盘。 该方法包括在等离子体点火步骤中点燃等离子体。 当偏置补偿电路向卡盘提供的第一偏置补偿电压基本上为零并且等离子体处理室内的第一室压力低于约90mTorr时，执行等离子体点火步骤。 该方法还包括在等离子体点燃之后的衬底处理步骤中处理衬底。 基板处理步骤采用由偏置补偿电路提供的第二偏置补偿电压，该偏置补偿电压高于第一偏置补偿电压，第二室压力基本上等于第一室压力。

公开(公告)号：EP1765541A4

公开(公告)日：2010-03-31

申请号：EP05761079

申请日：2005-06-14

Applicant: LAM RES CORP

Inventor： WIEPKING MARK ,  LYNDAKER BRADFORD J ,  KUTHI ANDRAS ,  FISCHER ANDREAS

IPC: B23K9/00 ,  B23K9/02

CPC classification number: H01J37/32009 ,  H01J37/32082 ,  H01J37/32706

公开(公告)号：AU5925999A

公开(公告)日：2000-04-17

申请号：AU5925999

申请日：1999-09-15

Applicant: LAM RES CORP

Inventor： WINNICZEK JAROSLAW W ,  DASSAPA M J FRANCOIS CHANDRASE ,  HUDSON ERIC A ,  WIEPKING MARK

IPC: H01L21/302 ,  H01J37/32 ,  H01L21/3065 ,  H01L21/66 ,  H01L21/683 ,  H02N13/00 ,  H01L21/68

Abstract: Methods and apparatus for ascertaining the end of an etch process while etching through a target layer on a substrate in a plasma processing system which employs an electrostatic chuck. The end of the etch process is ascertained by monitoring the electric potential of the substrate to detect a pattern indicative of the end of the etch process. By the way of example, changes to this potential may be observed by monitoring the current flowing to the pole of the electrostatic chuck. Upon ascertaining the pattern indicative of the end of the etch process, for example by monitoring the current signal, a control signal is produced to terminate the etch. If a bias compensation power supply is provided to keep the currents flowing to the poles of the electrostatic chuck substantially equal but opposite in sign throughout the etch, the compensation voltage output by the bias compensation power supply may be monitored for the aforementioned pattern indicative of the end of the etch process in order to terminate the etch.

公开(公告)号：IL180388A

公开(公告)日：2010-05-31

申请号：IL18038806

申请日：2006-12-27

Applicant: LAM RES CORP ,  WIEPKING MARK ,  LYNDAKER BRADFORD J ,  KUTHI ANDRAS ,  FISCHER ANDREAS

Inventor： WIEPKING MARK ,  LYNDAKER BRADFORD J ,  KUTHI ANDRAS ,  FISCHER ANDREAS

Abstract: A method in a plasma processing system for processing a semiconductor substrate is disclosed. The plasma processing system includes a plasma processing chamber and an electrostatic chuck coupled to a bias compensation circuit. The method includes igniting a plasma in a plasma ignition step. Plasma ignition step is performed while a first bias compensation voltage provided by the bias compensation circuit to the chuck is substantially zero and while a first chamber pressure within the plasma processing chamber is below about 90 mTorr. The method further includes processing the substrate in a substrate-processing step after the plasma is ignited. The substrate-processing step employs a second bias compensation voltage provided by the bias compensation circuit that is higher than the first bias compensation voltage and a second chamber pressure substantially equal to the first chamber pressure.