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公开(公告)号:DE60004722T2
公开(公告)日:2004-06-17
申请号:DE60004722
申请日:2000-04-13
Applicant: MATSUSHITA ELECTRONICS CORP
Inventor: YURI MASAAKI , IMAFUJI OSAMU , NAKAMURA SHINJI , ISHIDA MASAHIRO , ORITA KENJI
IPC: H01L21/20 , H01L21/205 , H01L31/18 , H01L33/00
Abstract: The present invention provides a method for producing a group III nitride compound semiconductor substrate including: (a) forming a first semiconductor film over a substrate, the first semiconductor film made of a first group III nitride compound semiconductor and provided with a step; (b) forming a second semiconductor film made of a second group III nitride compound semiconductor having a different thermal expansion coefficient from that of the first group III nitride compound semiconductor on the first semiconductor film; and (c) cooling the substrate and separating the second semiconductor film from the first semiconductor film. Thus, a large-area group III nitride compound semiconductor substrate can be produced in high yields and with high reproducibility.
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公开(公告)号:DE60004722D1
公开(公告)日:2003-10-02
申请号:DE60004722
申请日:2000-04-13
Applicant: MATSUSHITA ELECTRONICS CORP
Inventor: YURI MASAAKI , IMAFUJI OSAMU , NAKAMURA SHINJI , ISHIDA MASAHIRO , ORITA KENJI
IPC: H01L21/20 , H01L21/205 , H01L31/18 , H01L33/00
Abstract: The present invention provides a method for producing a group III nitride compound semiconductor substrate including: (a) forming a first semiconductor film over a substrate, the first semiconductor film made of a first group III nitride compound semiconductor and provided with a step; (b) forming a second semiconductor film made of a second group III nitride compound semiconductor having a different thermal expansion coefficient from that of the first group III nitride compound semiconductor on the first semiconductor film; and (c) cooling the substrate and separating the second semiconductor film from the first semiconductor film. Thus, a large-area group III nitride compound semiconductor substrate can be produced in high yields and with high reproducibility.
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公开(公告)号:JP2000353669A
公开(公告)日:2000-12-19
申请号:JP2000116072
申请日:2000-04-18
Applicant: MATSUSHITA ELECTRONICS CORP
Inventor: ISHIDA MASAHIRO , NAKAMURA SHINJI , ORITA KENJI , KONDO OSAMU , YURI MASAAKI
IPC: H01L21/205 , H01L21/20 , H01L21/338 , H01L29/04 , H01L29/20 , H01L29/205 , H01L29/812 , H01L29/861 , H01L33/00 , H01L33/06 , H01L33/12 , H01L33/14 , H01L33/16 , H01L33/22 , H01L33/32 , H01S5/223 , H01S5/323 , H01S5/343
Abstract: PROBLEM TO BE SOLVED: To reduce defects of a semiconductor substrate. SOLUTION: An Al0.5Ga0.5N layer 27 is grown on a crystal substrate 1 to a thickness of 1.5 μm. Here, trimethylgallium, trimethylaluminum, and ammonia are used as the material so that a mol supply ratio among Ga, Al, and N, is set so that Ga:Al:N=0.5:0.5:5,500. Then, a zigzag shape step of the height of 2 μm is formed at the Al0.5Ga0.5N layer 27 through reactive ion etching. The step is deeper than the thickness of the Al0.5Ga0.5N layer 27, with a bottom part reaching the GaN substrate 1. An Al0.5Ga0.5N layer 28 is grown on the Al0.5Ga0.5N layer 27 to a depth of 30 μm.
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公开(公告)号:JP2000311863A
公开(公告)日:2000-11-07
申请号:JP2000032031
申请日:2000-02-09
Applicant: MATSUSHITA ELECTRONICS CORP
Inventor: ISHIDA MASAHIRO , YURI MASAAKI , KONDO OSAMU , NAKAMURA SHINJI , ORITA KENJI
Abstract: PROBLEM TO BE SOLVED: To improve crystallinity of a nitride compound semiconductor layer constituting a semiconductor device. SOLUTION: A 1.5-μm thick distortion relaxing layer 101, which has a second thermal expansion coefficient T2 (2.55×10-6/K) and consists of a silicon layer, is formed on a 300-μm thick substrate 100, which has a first thermal expansion coefficient T1 (7.5×10-6/K) and consists of a sapphire layer. After that, a 3.0-μm thick GaN layer 103 having a third thermal expansion coefficient T3 (5.59×10-6/K) is formed on the layer 101 via a 0.05-μm thick AlN layer 102 which is used as a buffer layer.
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公开(公告)号:JP2000216164A
公开(公告)日:2000-08-04
申请号:JP24425799
申请日:1999-08-31
Applicant: MATSUSHITA ELECTRONICS CORP
Inventor: ORITA KENJI , ISHIDA MASAHIRO , NAKAMURA SHINJI , YURI MASAAKI
IPC: H01L21/205 , H01L21/22 , H01L21/285 , H01L21/324 , H01L33/06 , H01L33/32 , H01L33/40 , H01L33/00
Abstract: PROBLEM TO BE SOLVED: To enable reliable obtainment of a P type layer having a low resistance in a short time from a semiconductor layer of group III nitride while avoiding generation of defects in the semiconductor layer. SOLUTION: An N type contact layer 13 of GaN, an N type cladding layer 14 of AlGaN, an active layer 15 of InGaN, a first Mg-doped layer 16A of AlGaN and a second Mg-doped layer 17A of GaN are first sequentially grown on a substrate 11 of sapphire. Thereafter the substrate having the second Mg-doped layer 17a formed thereon is exposed to nitrogen plasma for 40 minutes. As a result, Mg atoms as acceptors doped in the first and second Mg-doped layers 16A and 17A are activated so that the P type cladding layer 16B and P type contact layer 17B can be obtained having a low resistance and a good crystallization respectively.
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公开(公告)号:JP2000151022A
公开(公告)日:2000-05-30
申请号:JP25495099
申请日:1999-09-08
Applicant: MATSUSHITA ELECTRONICS CORP
Inventor: NAKAMURA SHINJI , ISHIDA MASAHIRO , YURI MASAAKI , KONDO OSAMU , ORITA KENJI
Abstract: PROBLEM TO BE SOLVED: To reduce a wave guide loss, by providing a substrate, an emitting layer, a semiconductor layer made of a first third family nitride crystal of a hexagonal crystal and a clad layer made of a second third family nitride crystal formed on the semiconductor layer, and by forming a trench having a stripe shape in a specified direction on the semiconductor layer. SOLUTION: A buffer layer 2 and an n-side contact layer 3 are orderly formed on a substrate 1. An n-side clad layer 4 is formed at a part of the n-side clad layer 3. Additionally a light emitting layer 5, a first p-side clad layer 6 and an n-type current obstructing layer (semiconductor layer) 7 are orderly formed on the n-side clad layer 4. A trench 7a having a stripe shape with a port width of about 1.5 7 μm which reaches the first p-side clad layer 6 is provided in order to transmit a current in a narrow region on the n-type current obstructing layer. The trench 7a is formed in the direction of of the current obstructing layer 7. In this case the side surface of the trench 7a has an inclination of 135 degree corresponding to the bottom surface of the trench 7a.
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公开(公告)号:JP2000106348A
公开(公告)日:2000-04-11
申请号:JP20763299
申请日:1999-07-22
Applicant: MATSUSHITA ELECTRONICS CORP
Inventor: ORITA KENJI , ISHIDA MASAHIRO , NAKAMURA SHINJI , YURI MASAAKI , KAMIMURA NOBUYUKI
Abstract: PROBLEM TO BE SOLVED: To improve surface flatness and crystallinity by a method wherein a first semiconductor layer is formed on a substrate, and a second semiconductor layer is formed on the first semiconductor layer, and a plurality of fine holes are formed in the first semiconductor layer, and constituting the second semiconductor layer by a group III nitride compound semiconductor. SOLUTION: A semiconductor layer 12 is formed on a substrate 11, and is provided with a plurality of fine holes 14 of which a mean diameter is 3 to 10 nm. And, on such the semiconductor layer 1 are laminated semiconductor layers 13 as an epitaxial layer using a group III nitride compound semiconductor expressed by a general formula GaxAlyInzN (wherein 0
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公开(公告)号:JPH11340507A
公开(公告)日:1999-12-10
申请号:JP14386598
申请日:1998-05-26
Applicant: MATSUSHITA ELECTRONICS CORP
Inventor: HASHIMOTO TADAAKI , YURI MASAAKI , KONDO OSAMU , ISHIDA MASAHIRO
Abstract: PROBLEM TO BE SOLVED: To eliminate the chipping of a semiconductor light-emitting element, which occurs when the element is split from a substrate. SOLUTION: A semiconductor light-emitting element is constituted by successively laminating an n-type GaN layer 4, a p-type GaN layer 5, and a positive electrode 6 all of which have the same shape on the main surface of an n-type GaN substrate 3 having an equilateral triangular surface composed of the (0001)-face of the crystal from which the substrate 3 is made and side faces respectively composed of the (-1010)-face, (01-10)-face and (1-100)-face of the crystal. Therefore, the splitting direction of the element from the substrate 3 can be set along the cleavage plane of the crystal and the chipping of the light-emitting element, which occurs when the element is split from the substrate 3, can be eliminated.
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公开(公告)号:JPH11307458A
公开(公告)日:1999-11-05
申请号:JP11315998
申请日:1998-04-23
Applicant: MATSUSHITA ELECTRONICS CORP
Inventor: ISHIDA MASAHIRO , YURI MASAAKI , KONDO OSAMU , HASHIMOTO TADAAKI
IPC: H01L29/12 , H01L21/205 , H01S5/00 , H01S5/323 , H01S3/18
Abstract: PROBLEM TO BE SOLVED: To eliminate the need for an annealing process after formation of a P-type nitride compound semiconductor and realize a manufacturing method of a P-type nitride compound semiconductor of low resistance. SOLUTION: The method has a first formation process for forming a P-type nitride compound semiconductor layer by supplying raw material with group III atom, raw material with nitrogen atom and doping raw material into a furnace, a stoppage process for temporarily stopping supply of the three kinds of raw materials into a furnace and a second formation process for forming a P-type nitride compound semiconductor layer by supplying the three kinds of raw materials into a furnace again.
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公开(公告)号:JPH10284802A
公开(公告)日:1998-10-23
申请号:JP8793597
申请日:1997-04-07
Applicant: MATSUSHITA ELECTRONICS CORP , SUGINO TAKASHI
Inventor: KONDO OSAMU , YURI MASAAKI , HASHIMOTO TADAAKI , ISHIDA MASAHIRO , SUGINO TAKASHI
Abstract: PROBLEM TO BE SOLVED: To improve crystallinity of a nitride-based compound semiconductor film by making the film thickness of a crystalline substrate of an element on which the nitride-based compound semiconductor film expressed by a specific formula is formed thinner than the thickness of the film thickness of the nitride- based compound semiconductor film. SOLUTION: A nitride-based compound semiconductor light emitting component which is provided with a nitride-based compound semiconductor film expressed by Al(1- X) GaXN (0
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