公开(公告)号：DE60004722T2

公开(公告)日：2004-06-17

申请号：DE60004722

申请日：2000-04-13

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： YURI MASAAKI ,  IMAFUJI OSAMU ,  NAKAMURA SHINJI ,  ISHIDA MASAHIRO ,  ORITA KENJI

IPC: H01L21/20 ,  H01L21/205 ,  H01L31/18 ,  H01L33/00

Abstract: The present invention provides a method for producing a group III nitride compound semiconductor substrate including: (a) forming a first semiconductor film over a substrate, the first semiconductor film made of a first group III nitride compound semiconductor and provided with a step; (b) forming a second semiconductor film made of a second group III nitride compound semiconductor having a different thermal expansion coefficient from that of the first group III nitride compound semiconductor on the first semiconductor film; and (c) cooling the substrate and separating the second semiconductor film from the first semiconductor film. Thus, a large-area group III nitride compound semiconductor substrate can be produced in high yields and with high reproducibility.

公开(公告)号：DE60004722D1

公开(公告)日：2003-10-02

申请号：DE60004722

申请日：2000-04-13

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： YURI MASAAKI ,  IMAFUJI OSAMU ,  NAKAMURA SHINJI ,  ISHIDA MASAHIRO ,  ORITA KENJI

IPC: H01L21/20 ,  H01L21/205 ,  H01L31/18 ,  H01L33/00

Abstract: The present invention provides a method for producing a group III nitride compound semiconductor substrate including: (a) forming a first semiconductor film over a substrate, the first semiconductor film made of a first group III nitride compound semiconductor and provided with a step; (b) forming a second semiconductor film made of a second group III nitride compound semiconductor having a different thermal expansion coefficient from that of the first group III nitride compound semiconductor on the first semiconductor film; and (c) cooling the substrate and separating the second semiconductor film from the first semiconductor film. Thus, a large-area group III nitride compound semiconductor substrate can be produced in high yields and with high reproducibility.

公开(公告)号：EP0977471A4

公开(公告)日：2001-10-10

申请号：EP98957171

申请日：1998-12-04

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： YAMANE SHIGERU ,  NISHII TOSHIHIRO ,  NAKAMURA SHINJI ,  SAKAI MASAYUKI

IPC: B23K26/00 ,  B23K26/12 ,  B23K26/38 ,  H05K3/00 ,  H05K3/22 ,  H05K3/40

CPC classification number: H05K3/0032 ,  H05K3/227 ,  H05K3/4069 ,  H05K2201/0355 ,  H05K2203/081 ,  H05K2203/085 ,  H05K2203/1383 ,  H05K2203/1388 ,  H05K2203/1461 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T156/1056 ,  Y10T156/1062 ,  Y10T428/24994 ,  Y10T442/2902

Abstract: A method of fabricating a circuit-forming-substrate comprising the step of forming a hole by an energy beam such as a laser beam, wherein formation of a resin film by a substrate-material resin oozing to the inner-wall surface of a hole is prevented, by lowering the water-absorption percentage of a substrate material through the dehumidifying step as the preprocess of the hole-forming step for forming a through-hole or non-through-hole for interconnecting circuits formed on both sides or in multiple layers, thereby it is possible to realize high-quality hole-formation by preventing a defective resin film formation and obtain a high-reliability circuit forming substrate.

Abstract translation: 一种用于制造印刷布线板，其包括通过在能量束而形成孔的步骤的方法：薄膜由基底材料树脂渗出到孔的内壁表面上，如激光束，worin形成树脂的防止 ，通过除湿步骤作为用于形成用于互连上形成bothsides或在多个层中的电路的贯通孔或非贯通孔的孔加工工序的预处理降低一个基底材料的吸水百分率，从而 它可以通过防止有缺陷的树脂膜形成，实现高品质的孔加工的形成和得到高可靠性的印刷布线板。

公开(公告)号：JP2001176809A

公开(公告)日：2001-06-29

申请号：JP2000303217

申请日：2000-10-03

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： ISHIDA MASAHIRO ,  NAKAMURA SHINJI ,  ORITA KENJI ,  KONDO OSAMU ,  YURI MASAAKI

IPC: C23C16/34 ,  H01L21/205 ,  H01S5/323 ,  H01S5/343

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device which has further reduced defects. SOLUTION: This semiconductor device is equipped with a substrate 102 which has on its surface a hollow in a closed shape, when viewed from a substrate normal direction, and a semiconductor layer 103 formed on the surface of the substrate 102 by crystal growth at least from internal surface (105, 106, and 107) of a hollow 104.

公开(公告)号：JP2000156524A

公开(公告)日：2000-06-06

申请号：JP13384499

申请日：1999-05-14

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： ISHIDA MASAHIRO ,  NAKAMURA SHINJI ,  ORITA KENJI ,  KONDO OSAMU ,  YURI MASAAKI

IPC: H01L21/205 ,  H01L21/20 ,  H01L21/338 ,  H01L29/04 ,  H01L29/20 ,  H01L29/205 ,  H01L29/812 ,  H01L29/861 ,  H01L33/00 ,  H01L33/06 ,  H01L33/12 ,  H01L33/14 ,  H01L33/16 ,  H01L33/22 ,  H01L33/32 ,  H01S5/223 ,  H01S5/323 ,  H01S5/343

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device with high performance and reliability by reducing lattice defects in an active region of a semiconductor element. SOLUTION: This device has lattice defect (a) and comprises a substrate 1 having steps on its surface, an active layer 5 formed on the substrate 1 and consisting of an InGaN quantum well having a low defect region (b) on the steps and a semiconductor element on the substrate 1. An active region 5a of the semiconductor element is formed in the low defect region (b). This active region 5a is preferably formed on a flat part of the active layer consisting of the InGaN quantum well.

公开(公告)号：JP2000200946A

公开(公告)日：2000-07-18

申请号：JP30171299

申请日：1999-10-22

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NAKAMURA SHINJI ,  YURI MASAAKI ,  ORITA KENJI

IPC: H01S5/30 ,  H01L33/00 ,  H01L33/06 ,  H01L33/14 ,  H01L33/32 ,  H01S5/323 ,  H01S5/343

Abstract: PROBLEM TO BE SOLVED: To manufacture a highly precise waveguide structure with good control and thereby enable single transverse mode oscillation, by forming a second conductive type first semiconductor layer, whose Al composition ratio is smaller than that of a first conductive type etching stop layer on the etch stopping layer. SOLUTION: Since an etch stopping layer 17 whose Al composition ratio is larger than that of an n-type current blocking layer 12 is formed immediately below the n-type current blocking layer 12, etching of the n-type current blocking layer 12 can be blocked in the etch stopping layer 17. Therefore, it is possible to accurately and uniformly control the etching depth of the n-type current blocking layer 12 and to obtain a waveguide structure which is more precise than a conventional one. A first p-type clad layer 8 whose Al composition ratio is smaller than that of the etch stopping layer 17 is formed immediately below the etching stop layer 17. Since the lower the Al composition ratio is, the is larger the refractive index, therefore, light confinement can be carried out well in this structure.

公开(公告)号：JP2000357663A

公开(公告)日：2000-12-26

申请号：JP2000108497

申请日：2000-04-10

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： YURI MASAAKI ,  KONDO OSAMU ,  NAKAMURA SHINJI ,  ISHIDA MASAHIRO ,  ORITA KENJI

IPC: C30B29/38 ,  H01L21/205 ,  H01L33/32 ,  H01L33/44 ,  H01S5/323 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To manufacture a large-area III nitride base compound semiconductor substrate with a satisfactory yield and satisfactory reproducibility. SOLUTION: First, a first semiconductor film 13 that is formed of a first III nitride based compound semiconductor having a stepped portion 13c is formed on a substrate 11 (Fig. b). Thereafter, a second semiconductor film 14a composed of a second III nitride based compound semiconductor having a thermal expansion coefficient that is different from that of the first III nitride based compound semiconductor is formed (Fig. c). Thereafter, the substrate 11 is cooled, and the second semiconductor film 14a is isolated from the first semiconductor film 13 to obtain the III nitride based compound semiconductor substrate 14.

公开(公告)号：JP2000277802A

公开(公告)日：2000-10-06

申请号：JP7912299

申请日：1999-03-24

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NAKAMURA SHINJI ,  YURI MASAAKI ,  KONDO OSAMU ,  ISHIDA MASAHIRO ,  ORITA KENJI

IPC: H01L21/28 ,  H01L33/06 ,  H01L33/12 ,  H01L33/32 ,  H01L33/36 ,  H01L33/40 ,  H01S5/00 ,  H01S5/042 ,  H01S5/323 ,  H01S5/343 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To lower resistivity in p- and n-type ohmic electrodes of a semiconductor device composed of a III-V nitride compound semiconductor. SOLUTION: On a sapphire substrate 1, an undoped GaN buffer layer 2, an undoped GaN layer 3, a p-type doped GaN 4a doped with Mg, which is a p-type impurity, are sequentially grown in crystallized states (a). Then a p-type electrode 9 is formed by sequentially vapor-depositing alloy film 8 made of Ni and Mg and an Au film 6 on the p-type doped GaN film 4a (b). Thereafter, the p-type doped GaN layer 4a is changed into a low-resistance GaN layer 4 by activating Mg contained in the layer 4a by expelling hydrogen from the layer 4a by subjecting it to temperature raising and lowering of the temperature of the substrate 1 between 70 deg.C and room temperature three times.

公开(公告)号：JP2000353669A

公开(公告)日：2000-12-19

申请号：JP2000116072

申请日：2000-04-18

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： ISHIDA MASAHIRO ,  NAKAMURA SHINJI ,  ORITA KENJI ,  KONDO OSAMU ,  YURI MASAAKI

IPC: H01L21/205 ,  H01L21/20 ,  H01L21/338 ,  H01L29/04 ,  H01L29/20 ,  H01L29/205 ,  H01L29/812 ,  H01L29/861 ,  H01L33/00 ,  H01L33/06 ,  H01L33/12 ,  H01L33/14 ,  H01L33/16 ,  H01L33/22 ,  H01L33/32 ,  H01S5/223 ,  H01S5/323 ,  H01S5/343

Abstract: PROBLEM TO BE SOLVED: To reduce defects of a semiconductor substrate. SOLUTION: An Al0.5Ga0.5N layer 27 is grown on a crystal substrate 1 to a thickness of 1.5 μm. Here, trimethylgallium, trimethylaluminum, and ammonia are used as the material so that a mol supply ratio among Ga, Al, and N, is set so that Ga:Al:N=0.5:0.5:5,500. Then, a zigzag shape step of the height of 2 μm is formed at the Al0.5Ga0.5N layer 27 through reactive ion etching. The step is deeper than the thickness of the Al0.5Ga0.5N layer 27, with a bottom part reaching the GaN substrate 1. An Al0.5Ga0.5N layer 28 is grown on the Al0.5Ga0.5N layer 27 to a depth of 30 μm.

公开(公告)号：JP2000311863A

公开(公告)日：2000-11-07

申请号：JP2000032031

申请日：2000-02-09

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： ISHIDA MASAHIRO ,  YURI MASAAKI ,  KONDO OSAMU ,  NAKAMURA SHINJI ,  ORITA KENJI

IPC: H01L21/205 ,  H01L33/12 ,  H01L33/16 ,  H01L33/32 ,  H01L33/34 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To improve crystallinity of a nitride compound semiconductor layer constituting a semiconductor device. SOLUTION: A 1.5-μm thick distortion relaxing layer 101, which has a second thermal expansion coefficient T2 (2.55×10-6/K) and consists of a silicon layer, is formed on a 300-μm thick substrate 100, which has a first thermal expansion coefficient T1 (7.5×10-6/K) and consists of a sapphire layer. After that, a 3.0-μm thick GaN layer 103 having a third thermal expansion coefficient T3 (5.59×10-6/K) is formed on the layer 101 via a 0.05-μm thick AlN layer 102 which is used as a buffer layer.