公开(公告)号：JPH0531292B2

公开(公告)日：1993-05-12

申请号：JP19287484

申请日：1984-09-14

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKASU YASUHIRO ,  TODOKORO YOSHIHIRO

IPC: H01L21/027 ,  H01L21/30

公开(公告)号：JPH0377349A

公开(公告)日：1991-04-02

申请号：JP21385089

申请日：1989-08-18

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKASU YASUHIRO ,  KAJITANI ATSUHIRO ,  KISHIMOTO MIKIO

IPC: H01L21/76 ,  H01L21/316

Abstract: PURPOSE:To eliminate a change in a shape on the surface of a substrate by a bird's beak and to execute an element isolation operation which does not cause a narrow channel effect and a substrate bias effect when a channel stopper is formed by a method wherein ions are implanted by using a mask by means of which the ions are not implanted into a part other than a LOCOS region and the channel stopper is formed. CONSTITUTION:Thermally oxidized silicon 13 is deposited on a substrate; polycrystalline silicon 14 and a silicon nitride 15 are deposited on it; a resist pattern 16 is formed in a part other than an isolation region. A window 17 is opened in the isolation region by using a reactive ion etching operation; the resist pattern 16 is removed. A silicon nitride is deposited, a polycrystalline sidewall 14a is covered with a silicon nitride 18 by a reactive ion etching operation. After that, a LOCOS growth operation 19 is executed by a thermal oxidation operation of dry O2 at a growth temperature of 1000 deg.C. Since the silicon nitride 18 comes into contact with the surface of a substrate at end parts 25 of the isolation region, oxygen is hard to oxidize in a transverse direction and, as a result, forming of a bird's beak is difficult.

公开(公告)号：JPH02214136A

公开(公告)日：1990-08-27

申请号：JP3443989

申请日：1989-02-14

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKASU YASUHIRO

IPC: H01L21/76

Abstract: PURPOSE:To realize a low cost and to enhance a crystalline property and an element characteristic by a method wherein elements are formed respectively on a semiconductor crystal surrounded by an insulating film formed at an inner wall of a U-shaped part and on a semiconductor substrate. CONSTITUTION:Parts, formed at bottom faces of U-shaped parts 21, of an insulating film 22 deposited on the surface of a semiconductor substrate 20 in which the U-shaped parts 21 have been formed are etched and removed. A semiconductor crystal 23 is grown epitaxially on the surface of the semiconductor substrate 20 where the insulating film 22 has been etched and removed; the crystal is flattened by an etching-back method; the surface of the insulating film 22 formed outside the U-shaped parts 21 is exposed. After that, the insulating film 22 outside the U-shaped parts 21 is etched and removed; elements 26, 27 such as semiconductor elements or the like are formed respectively on the semiconductor single crystal 23 surrounded by the insulating film 23 formed at inner walls of the U-shaped parts 21 and on the semiconductor substrate 20. Thereby, a low cost is realized, and a crystalline property and an element characteristic are enhanced.

公开(公告)号：JPH01275999A

公开(公告)日：1989-11-06

申请号：JP10719388

申请日：1988-04-27

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKASU YASUHIRO

IPC: G01F1/68 ,  F17D5/00 ,  G01F1/684 ,  G01F1/69 ,  H01L21/205 ,  H01L21/302

Abstract: PURPOSE:To make an abnormal spot in a pipeline part easily detectable by installing each gas flow monitor in two spots of the pipeline part for bridge type gas piping, while installing a flow regulating part in one side consisting of a main pipeline part. CONSTITUTION:A main pipeline part 2 and a bypass pipeline part 3 are connected to a mass flow controller 1 in a parallel manner, and a bridge type gas pipeline made up of having a diagonal pipeline part 4 connected to each midpoint is installed in the point midway of a gas pipeline 12. A second sensor part 6 is installed in the diagonal pipeline 4 where a first sensor part 5 is installed in one side consisting of the bypass pipeline 3 of the bridge type gas pipeline, and furthermore a flow regulating part 7 is installed in one side consisting of the main pipeline 2. An output signal of the second sensor part 6 is outputted as an abnormal signal (c) via a bridge circuit 8.

公开(公告)号：JPH01175732A

公开(公告)日：1989-07-12

申请号：JP33456787

申请日：1987-12-29

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKASU YASUHIRO

IPC: G03F7/20 ,  H01L21/027

Abstract: PURPOSE:To reduce the influence of secondary electrons to facilitate formation of a finer pattern and, when regions whose exposed regions are different from each other are exposed simultaneously, facilitate reduction of the difference in exposure rate created by the difference in pattern width by a method wherein a substrate is exposed to X rays or charge beams while a uniform magnetic field is applied vertically to the exposed substrate. CONSTITUTION:A substrate 4 is exposed to X rays 1 or charge beams while a uniform magnetic field is applied vertically to the exposed substrate 4. For instance, a magnet 7 wafer form is provided beneath the wafer 4 to apply a uniform magnetic field vertically to the wafer 4. Then SOR beams 1 are applied to an X ray mask 3 through a beryllium window 2 with a thickness of 50mum. Some of the X rays applied to the X ray mask 3 are absorbed by an absorber 9 and the other are transmitted through a transmitting part 10 and applied to a resist film 11 on the wafer 4 vertically. With this constitution, a force is applied by the magnetic field to the velocity component vertical to the magnetic field among the velocity components of secondary electrons produced by the X rays applied to the resist film and the secondary electrons move in a spiral movement so that the lateral spread of the secondary electrons in the resist film can be reduced.

公开(公告)号：JPS62119923A

公开(公告)日：1987-06-01

申请号：JP26015185

申请日：1985-11-20

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKASU YASUHIRO ,  TODOKORO YOSHIHIRO ,  OKADA HIROYUKI

IPC: G03C5/00 ,  G03F7/20 ,  H01L21/027 ,  H01L21/30

Abstract: PURPOSE:To obtain the vertical side wall pattern without side etching by subjecting a resist film of a lower layer to the reactive ion etching using a mixed gas of CCl4 and O2 of specified mixing ratio while using a resist pattern of an upper layer as a mask. CONSTITUTION:A positive photoresist (OFPR-800 resist) 3 is spread over an Al thin film 2 deposited on an Si substrate 1. Next, an SiO2 film (OCD) 4 is formed on that an further a positive resist (PMMA resist) 5 having an etching resistance different from that of the resist 3. Then, the exposure using electron beams 6 and development are performed to form a resist pattern (PMMA resist pattern) 7. The film 4 is etched by reactive ion etching using the pattern 7 as a mask to form a pattern (OCD pattern) 8 of an intermediate layer. By using this pattern 8 as a mask, the resist 3 is etched by reactive ion etching to form a resist pattern (OFPR-800 resist pattern) 9. For this etching, a mixed gas of CCl4 and O2 in which a mixing ratio of CCl4 to O2 is 5-20wt% is used. Consequently, the pattern having vertical side walls without side etching can be formed.

公开(公告)号：JPS6290932A

公开(公告)日：1987-04-25

申请号：JP22989185

申请日：1985-10-17

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： WATANABE HISASHI ,  TAKASU YASUHIRO ,  TODOKORO YOSHIHIRO

IPC: H01L21/30 ,  H01L21/027 ,  H01L21/302 ,  H01L21/3065

Abstract: PURPOSE:To readily form negative resist pattern of novolac resin by means of a general ultraviolet exposing unit by bonding the novolac resin onto a semiconductor substrate, exposing the prescribed portion to ultraviolet light or far ultraviolet light, and then developing the prescribed portion with isoamyl acetate. CONSTITUTION:A novolac resin 2 on a semiconductor substrate 1 is emitted with ultraviolet light 3, and further dipped in isoamyl acetate to form a negative pattern 4. As an embodiment, when a pattern is formed on novolac resist OFPR-800, an Si substrate is covered with OFPR-800 1.5mum thick, and prebaked at 85 deg.C for 30min. Thereafter, it is conact-exposed for 5 min by means of an ultraviolet light source (100mW/cm ) with a photomask, and dipped in isoamyl acetate to form a negative resist pattern.

公开(公告)号：JPS6257219A

公开(公告)日：1987-03-12

申请号：JP19803285

申请日：1985-09-06

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKASU YASUHIRO ,  TODOKORO YOSHIHIRO ,  OKUMA TORU

IPC: H01L21/027 ,  H01L21/30

Abstract: PURPOSE:To prevent charge-up of electrons by electron beam exposure and to improve position accuracy of a pattern, by forming three resist layers, which have a conducting thin film as an intermediate layer. CONSTITUTION:A photoresist 6 is applied on a silicon substrate 5 having a step part. Prebaking is performed and flattening is carried out. On this surface, an organic metal solution 7, which includes indium and tin at a constituting ratio of Sn/In at 0.02-0.2, desirably 0.05-0.1, is rotatably applied. Thus a thin film is formed. Thereafter, the thin film is baked, and an oxide film of indium and tin (ITO) is obtained. On the ITO film, positive type resist PMMA 8 (polymethyl methacrylate) for an electron beam is applied. The three resist layers is formed by prebaking.

公开(公告)号：JPS6197832A

公开(公告)日：1986-05-16

申请号：JP22001384

申请日：1984-10-18

Applicant: Matsushita Electronics Corp

Inventor： TAKASU YASUHIRO ,  TODOKORO YOSHIHIRO

IPC: G03F7/20 ,  H01L21/027 ,  H01L21/30

CPC classification number: H01L21/30

Abstract: PURPOSE:To enable repetition transcription of high throughput and small shift and small obscurity by a method wherein an X-ray reflector which determines the exposure area is installed at an angle whereby X-ray beams are totally reflected, in an X-ray beam radiated from the target. CONSTITUTION:A target 11 is irradiated with electron beams 9 emitted from an electron gun 8, and soft X rays 12 of wavelength 8.34Angstrom generate. Part of this X-ray is made incident into the plane of a total reflection plate 16, and the other is adsorbed by a disc-shaped absorption plate 17. The total reflection plate 16 is installed 30cm below the target so as to be a total reflection plate 18 for the soft X-ray emitted from the right end 14 of an electron beam spot. For example, totally reflected soft X ray comes into a mask 22 with an angle 21 of 3.18 deg. to the vertical direction. With respect to the reflected light at each position on the total reflection plate 16, the total reflected light at the lower end 23 of the total reflection plate 16 spreads by an angle 24 of 3.53 deg. to the vertical direction. Since soft X rays due to total reflection thus spread only outward, obscurity caused by the soft X ray irradiating the mask does not generate, but only the shift at the mask ends generates.

Abstract translation: 目的：为了能够通过以下方法实现高通量和小偏移和小的不透明度的重复转录，其中确定曝光区域的X射线反射器以X射线束被全反射的角度安装在辐射的X射线束中 从目标。 构成：用电子枪8发射的电子束9照射目标物11，产生波长8.34埃的软X射线12。 该X射线的一部分入射到全反射板16的平面中，另一部分被盘形吸收板17吸附。全反射板16安装在靶下方30cm处，总计 用于从电子束点的右端14发射的软X射线的反射板18。 例如，全反射的软X射线进入具有3.18度的角度21的掩模22。 到垂直方向。 对于全反射板16上的每个位置处的反射光，全反射板16的下端23处的总反射光扩展了3.53度的角度24。 到垂直方向。 由于由于全反射而产生的软X射线仅向外扩散，所以不产生由照射掩模的软X射线引起的晦暗，而仅产生掩模端的偏移。

公开(公告)号：JPS6116521A

公开(公告)日：1986-01-24

申请号：JP13831184

申请日：1984-07-03

Applicant: Matsushita Electronics Corp

Inventor： YAMAO TATSUHIKO ,  TAKASU YASUHIRO ,  TODOKORO YOSHIHIRO

IPC: H01L21/30 ,  B05D3/06 ,  G03F7/30 ,  H01L21/027

CPC classification number: H01L21/0271

Abstract: PURPOSE:To remove a resist after exposure easily at room temperature without utilizing a plasma ashing device by a method wherein, after irradiating a negative resist pattern on a substrate by rays with specific wavelength, the substrate is immersed in an acid or organic solvent. CONSTITUTION:A masking substrate 1 is coated with a chrome film 2 and negative resist 3 while the negative resist 3 is exposed to electric beams and developed to form a resist pattern 5. Then a chrome pattern 6 is formed utilizing the pattern 5 as a mask. Next the resist pattern 5 is removed by means of irradiating it with far ultraviolet rays 7 with central wavelength not exceeding 300nm for 10min and then immersing it in concentrated sulfuric acid at room temperature for 3min. The irradiation time with far ultraviolet rays required for removing resist may be shortened by means of raising the substrate temperature in case of irradiating the substrate with far ultraviolet rays. In other words, the irradiation time with far ultraviolet rays takes 10min when the substrate temperature is at room temperature but if it is raised up to 200 deg.C, 1min will suffice for the irradiation.

Abstract translation: 目的：在室温下容易地除去抗蚀剂后，不用等离子体灰化装置，其中通过具有特定波长的射线照射基片上的负光刻胶图案后，将基片浸入酸或有机溶剂中。 构成：掩蔽基板1涂覆有铬膜2和负性抗蚀剂3，同时将负性抗蚀剂3暴露于电子束并显影以形成抗蚀剂图案5.然后，使用图案5作为掩模形成铬图案6 。 接下来，通过用中心波长不超过300nm的远紫外线7照射10分钟，然后在室温下将其浸入浓硫酸中3分钟，去除抗蚀图案5。 在用紫外线照射基板的情况下，通过提高基板温度，可以缩短去除抗蚀剂所需的远紫外线的照射时间。 换句话说，当基板温度为室温时，远紫外线的照射时间为10分钟，但如果升高到200摄氏度，则1分钟就足以照射。