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公开(公告)号：US20230254959A1
公开(公告)日：2023-08-10
申请号：US18165672
申请日：2023-02-07
Applicant: Melexis Technologies NV
Inventor： Michael FREY , Jorgen STURM , Thomas FREITAG
Abstract: A safety related light system includes: one light source, a first control circuit, and a second control circuit. One of the first control circuit or the second control circuit is selectively enabled to operate in a drive mode to operate the one light source.
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公开(公告)号：US20200144139A1
公开(公告)日：2020-05-07
申请号：US16735117
申请日：2020-01-06
Applicant: Melexis Technologies NV
Inventor： Gunnar MUNDER , Heiko GRIMM , Thomas FREITAG
Abstract: An edge crack monitoring system for an integrated circuit provided on a die, comprises a conductive trace comprising at least a first conductive path for allowing current in a first direction, and a second adjacent conductive path for allowing current in a second direction opposite to the first direction. Both adjacent conductive paths form at least one loop surrounding a semiconductor device on a die. The arrangement of the trace is adapted to provide compensation of EM interferences. The trace comprises two terminals being connectable to a detection circuit for detecting damages by generating a fault signal upon detection of disruption of the conductive trace due to a damage. The conductive trace comprises high resistance portions with a resistance of at least 1 kΩ, adapted for reducing self-resonance.
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公开(公告)号：US20190132919A1
公开(公告)日：2019-05-02
申请号：US16173157
申请日：2018-10-29
Applicant: Melexis Technologies NV
Inventor： Raik FROST , Thomas FREITAG
IPC: H05B33/08
Abstract: A method for calibrating a light emitting diode (LED) of a red-green-blue type is arranged for setting a pulse width modulation duty cycle and for supplying to the LED either a current having a first value or a current having a second value higher than the first value.
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公开(公告)号：US20180177011A1
公开(公告)日：2018-06-21
申请号：US15846704
申请日：2017-12-19
Applicant: MELEXIS TECHNOLOGIES NV
Inventor： Jian CHEN , Thomas FREITAG , Michael BENDER
CPC classification number: H05B33/0842 , F21V15/01 , F21V23/003 , H01L25/0753 , H01L25/167 , H01L2224/05554 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2224/73265 , H01L2924/181 , H01L2924/00014 , H01L2924/00012
Abstract: The present invention relates to an integrated-LED device having a housing, whereby the housing comprises a multi-LED device comprising a transparent substrate and a plurality of light emitting diodes, LEDs, arranged for emitting light and disposed on said transparent substrate, an integrated circuit in connection with said LEDs and arranged for controlling said LEDs, a base comprising one or more base extensions, on which at least said multi-LED device is mounted, with said one or more base extensions so arranged or so shaped that a first opening is created to let pass LED light emitted through said transparent substrate by said plurality of LEDs.
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公开(公告)号：US20240031200A1
公开(公告)日：2024-01-25
申请号：US18355759
申请日：2023-07-20
Applicant: Melexis Technologies NV
Inventor： Raik FROST , Thomas FREITAG , Michael FREY , Heiko LEUTERT
IPC: H04L12/40
CPC classification number: H04L12/40078 , H04L12/40013
Abstract: A method for autoconfiguration of a plurality of nodes in a linear network allows extracting the address and position of each node. The method includes applying an identifier field for transmitting to the bus the bit sequence of the identifier of a chosen node. Then for at least for the first node to the last but one node, a field comprising a predetermined bit sequence is applied. The field comprises dominant bits, so a current is transmitted. Then, a further field is applied for transmitting any stored direction bit associated to that node and obtained in any previous iteration. The iteration continues by choosing a node different from a node chosen in any previous cycle, starting the communication, until all nodes are identified.
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Patent Agency Ranking
公开(公告)号：US20190132159A1
公开(公告)日：2019-05-02
申请号：US16170333
申请日：2018-10-25
Applicant: MELEXIS TECHNOLOGIES NV
Inventor： Michael FREY , Thomas FREITAG
Abstract: A transmitter for establishing communication between a device and a differential network bus includes current driving means connected to each of the two conduction lines of the differential network bus, through a first and second conduction paths of the transmitter; at least one unidirectional current regulator for extracting a first current equal to a known ratio of a parasitic current circulating through the first conduction path, with a direction inverse to the driving current through the conduction path connected to one of the lines of the differential bus; means for obtaining, from the first current, a second current with a magnitude equal to the original magnitude of the parasitic current; and means for introducing the second current into the second conduction path connected to the other line of the differential bus.
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公开(公告)号：US20180336145A1
公开(公告)日：2018-11-22
申请号：US15974862
申请日：2018-05-09
Applicant: MELEXIS TECHNOLOGIES NV
Inventor： Philippe LAUGIER , Benoit HEROUX , Thomas FREITAG
CPC classification number: G06F13/126 , G06F9/30 , G06F11/08 , G06F11/10 , G06F11/106 , G06F11/1096 , G06F11/2043 , G06F13/122 , G06F15/7832
Abstract: A method for performing an initialization or a reset of a port of an integrated circuit includes: receiving in a device for supervising ports, from a central processing unit of the integrated circuit, a port initialisation signal comprising port initialisation data and one or more parity bits; inverting in the device for supervising ports the one or more parity bits in accordance with the port initialization signal; providing the port initialisation signal comprising the port initialisation data and the inverted one or more parity bits to the port of the integrated circuit; on receipt of the port initialisation signal at the port, inverting again in the port the inverted one or more parity bits, thereby obtaining the original one or more parity bits and storing the port initialisation data and the just obtained original one or more parity bits.
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8.发明申请公开(公告)号：US20140062364A1
公开(公告)日：2014-03-06
申请号：US14013674
申请日：2013-08-29
Applicant: MELEXIS TECHNOLOGIES NV
Inventor： Viktor PETRI , Thomas FREITAG
IPC: H02P6/18
Abstract: A method for driving a BLDC motor comprising at least three stator windings, comprising: a) determining a time period, and energizing during the time period two of the windings and leaving a third winding un-energized, based on a first motor state; b) measuring a first voltage representative for the back-EMF generated in the un-energized winding shortly before expiry of the time period; c) applying a commutation at expiry of the current time period; d) measuring a second voltage shortly after the commutation, and calculating a subsequent time period; e) repeating steps b) and c). An electrical circuit and a controller are provided for performing these methods.
Abstract translation: 一种用于驱动包括至少三个定子绕组的BLDC电动机的方法，包括：a）基于第一电动机状态确定时间段，并且在所述绕组的两个时间段期间激励并使第三绕组未通电; b）在该时间段到期之前不久，测量代表在未通电绕组中产生的反电动势的第一电压; c）在当前期限届满时进行换货; d）在换向之后不久测量第二电压，并计算随后的时间段; e）重复步骤b）和c）。 提供电路和控制器来执行这些方法。
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公开(公告)号：US20190310597A1
公开(公告)日：2019-10-10
申请号：US16374007
申请日：2019-04-03
Applicant: Melexis Technologies NV
Inventor： Jörgen STURM , Michael BENDER , Michael FREY , Thomas FREITAG
IPC: G05B19/042 , G06F13/40
Abstract: A system having a plurality of devices configured in a daisy chain network including a communication bus connecting the devices and adapted to exchange address-setting information. Each device includes an input pin adapted to receive via an input signal line different from the communication bus a signal comprising configuration information for configuring at least the device; a configuration handling unit adapted to detect a configuration mode and to configure the device according to the configuration information; an indicator adapted to indicate whether the configuration handling unit has finished configuring the device; an output pin adapted to forward the configuration information to the daisy chain network when the indicator indicates the configuration of the device is done; and a safety handling unit adapted to be operable in a safety handling mode when the indicator indicates the configuration of the device is done.
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公开(公告)号：US20180337766A1
公开(公告)日：2018-11-22
申请号：US15981269
申请日：2018-05-16
Applicant: MELEXIS TECHNOLOGIES NV
Inventor： Jörgen STURM , Thomas FREITAG , Martin BÖLTER , Anton BABUSHKIN
CPC classification number: H04L7/0087 , H04L12/12 , H04L12/40 , H04L12/40039 , H04L2012/40215
Abstract: A circuit for receiving and processing a bit stream obtained from an electronic communication bus-system comprises a bit stream processor and bit sampling of the bit stream to provide a sampled output signal. The circuit comprises a frame decoder for decoding a data frame encoded in the sampled output signal, and a clock signal generator for generating a first clock signal for the bit stream processor. The circuit comprises a clock signal downsampler for generating a second clock signal having a lower frequency than the first clock signal, in which the second clock signal is based on a co-occurrence of a clock pulse in the first clock signal and the emission of a bit in the sampled output signal. The bit stream processor is adapted for synchronizing the first clock signal to an external protocol timing of the incoming bit stream.
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