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    SRTEAMING INPUT-OUTPUT PORTS IN A DIGITAL DEVICE
    1.
    发明申请
    SRTEAMING INPUT-OUTPUT PORTS IN A DIGITAL DEVICE 审中-公开
    数字设备中的输入输出端口

    公开(公告)号：WO2005119466A3

    公开(公告)日：2006-03-02

    申请号：PCT/US2005018516

    申请日：2005-05-26

    Applicant: MICROCHIP TECH INC ,  JULICHER JOSEPH HARRY ,  MASGRAS CRISTIAN P ,  PYSKA MICHAEL

    Inventor： JULICHER JOSEPH HARRY ,  MASGRAS CRISTIAN P ,  PYSKA MICHAEL

    IPC: G06F13/38 ,  H04Q11/00

    CPC classification number: G06F13/385

    Abstract: A digital device comprising a digital processor, a streaming input-output (I/O) port module, and an interface port module having an independent data and control bus may be independently coupled to the streaming I/O port module. The streaming I/O port module may also be coupled to the digital processor, wherein the digital process may control whether the streaming I/O port module is coupled to either the interface port module or the digital processor. The interface port module may also be coupled to the digital processor independently of the streaming I/O port module. The interface port module and the streaming I/O port module may be adapted for parallel and/or serial data transfers. The streaming I/O port may be used to couple an external peripheral device to either the digital processor or to the interface port module.

    Abstract translation: 包括数字处理器，流输入输出（I / O）端口模块和具有独立数据和控制总线的接口端口模块的数字设备可以独立地耦合到流I / O端口模块。 流式I / O端口模块还可以耦合到数字处理器，其中数字处理可以控制流I / O端口模块是否耦合到接口端口模块或数字处理器。 接口端口模块也可以独立于流I / O端口模块耦合到数字处理器。 接口端口模块和流I / O端口模块可适用于并行和/或串行数据传输。 流式I / O端口可用于将外部外围设备耦合到数字处理器或接口端口模块。

    ENABLING SPECIAL MODES WITHIN A DIGITAL DEVICE
    2.
    发明申请
    ENABLING SPECIAL MODES WITHIN A DIGITAL DEVICE 审中-公开
    在数字设备内启用特殊模式

    公开(公告)号：WO2006091468A3

    公开(公告)日：2006-12-21

    申请号：PCT/US2006005462

    申请日：2006-02-16

    Applicant: MICROCHIP TECH INC ,  MASGRAS CRISTIAN P ,  PYSKA MICHAEL ,  BOLES EDAWRD BRIAN ,  TRIECE JOSEPH W ,  WOJEWODA IGOR ,  CHEN MEI-LING

    Inventor： MASGRAS CRISTIAN P ,  PYSKA MICHAEL ,  BOLES EDAWRD BRIAN ,  TRIECE JOSEPH W ,  WOJEWODA IGOR ,  CHEN MEI-LING

    IPC: G06F11/27 ,  G11C29/46

    CPC classification number: G01R31/31701 ,  G06F11/273 ,  G11C29/003 ,  G11C29/46

    Abstract: A special mode key match comparison module has N-storage elements and a special mode key match comparator. The N-storage elements accumulate a serial data stream, and then determine whether a digital device should operate in a normal user mode, in a public programming mode, or in a particular private test mode. To reduce the possibility of accidentally decoding a false test or programming mode, the data stream has a sufficiently large number of N-bits to substantially reduce the probability of a false decode. To further reduce the possibility of accidentally decoding a programming or test mode, the special mode key match comparison module may be reset if less or more than N-clocks are detected during the accumulation of the N-bit serial data stream. The special mode key match data patterns may represent a normal user mode, a public programming mode, and particular private manufacturer test modes.

    Abstract translation: 特殊模式键匹配比较模块具有N个存储元件和特殊模式键匹配比较器。 N个存储元件累积串行数据流，然后确定数字设备是否应以正常用户模式，公共编程模式或特定专用测试模式运行。 为了减少意外解码错误测试或编程模式的可能性，数据流具有足够大数目的N位以显着降低错误解码的可能性。 为了进一步降低意外解码编程或测试模式的可能性，如果在N位串行数据流的累积期间检测到少于或多于N个时钟，则可以重置特殊模式密钥匹配比较模块。 特殊模式键匹配数据模式可以表示正常用户模式，公共编程模式和特定的私人制造商测试模式。

    3.
    发明专利
    未知

    公开(公告)号：AT534077T

    公开(公告)日：2011-12-15

    申请号：AT06735222

    申请日：2006-02-16

    Applicant: MICROCHIP TECH INC

    Inventor： MASGRAS CRISTIAN ,  PYSKA MICHAEL ,  BOLES EDWARD ,  TRIECE JOSEPH ,  WOJEWODA IGOR ,  CHEN MEI-LING

    IPC: G06F11/27 ,  G11C29/46

    Abstract: A special mode key match comparison module has N-storage elements and a special mode key match comparator. The N-storage elements accumulate a serial data stream, and then determine whether a digital device should operate in a normal user mode, in a public programming mode, or in a particular private test mode. To reduce the possibility of accidentally decoding a false test or programming mode, the data stream has a sufficiently large number of N-bits to substantially reduce the probability of a false decode. To further reduce the possibility of accidentally decoding a programming or test mode, the special mode key match comparison module may be reset if less or more than N-clocks are detected during the accumulation of the N-bit serial data stream. The special mode key match data patterns may represent a normal user mode, a public programming mode, and particular private manufacturer test modes.

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