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    1.
    发明专利
    未知

    公开(公告)号：AT460072T

    公开(公告)日：2010-03-15

    申请号：AT99964046

    申请日：1999-12-02

    Applicant: MOTOROLA INC

    Inventor： DUNN GREGORY ,  LACH LARRY ,  SAVIC JOVICA ,  BEUHLER ALLYSON ,  SIMONS EVERETT

    IPC: H05K1/16 ,  H01F17/00 ,  H01F41/04 ,  H01L21/768 ,  H01L23/522 ,  H05K1/00 ,  H05K3/00 ,  H05K3/06 ,  H05K3/46

    Abstract: A method for fabricating circuit board conductors with desirable processing and reduced self and mutual capacitance. The method generally entails forming a metal layer on a positive-acting photodielectric layer formed on a substrate, and then etching the metal layer to form at least two conductor traces that cover two separate regions of the photodielectric layer while exposing a third region of the photodielectric layer between the two regions. The third region of the photodielectric layer is then irradiated and developed using the two traces as a photomask, so that the third region of the photodielectric layer is removed. The two remaining regions of the photodielectric layer masked by the traces remain on the substrate and are separated by an opening formed by the removal of the third dielectric region. As a result, the traces are not only separated by a void immediately therebetween formed when the metal layer was etched, but are also separated by the opening formed in the photodielectric layer by the removal of the third region of the photodielectric layer. Traces formed in accordance with the above may be formed as adjacent and parallel conductors or adjacent inductor windings of an integral inductor.

    2.
    发明专利
    未知

    公开(公告)号：DE60039954D1

    公开(公告)日：2008-10-02

    申请号：DE60039954

    申请日：2000-02-25

    Applicant: MOTOROLA INC

    Inventor： DUNN GREGORY

    IPC: H01C17/06 ,  H01C17/28 ,  H01C1/14 ,  H01C7/00 ,  H05K1/09 ,  H05K1/16 ,  H05K3/00 ,  H05K3/24 ,  H05K3/46

    Abstract: A method of manufacturing a printed circuit board with a polymer thick-film (PTF) resistor whose dimensions can be defined with improved precision by providing a circuit board construction having a planar surface where the resistor is to be deposited. To achieve the desired board construction, the interconnect for the resistor is pattern plated using a permanent photodielectric layer as a plating mask instead of a sacrificial plating resist. The interconnect can be patterned before or after the PTF resistor ink is printed. The x and z dimensions (width and thickness, respectively) of the resistor are determined by the deposition process, while the y dimension (electrical length) is accurately determined by copper terminations.

    3.
    发明专利
    未知

    公开(公告)号：AT405938T

    公开(公告)日：2008-09-15

    申请号：AT00910349

    申请日：2000-02-25

    Applicant: MOTOROLA INC

    Inventor： DUNN GREGORY

    IPC: H01C17/06 ,  H01C17/28 ,  H01C1/14 ,  H01C7/00 ,  H05K1/09 ,  H05K1/16 ,  H05K3/00 ,  H05K3/24 ,  H05K3/46

    Abstract: A method of manufacturing a printed circuit board with a polymer thick-film (PTF) resistor whose dimensions can be defined with improved precision by providing a circuit board construction having a planar surface where the resistor is to be deposited. To achieve the desired board construction, the interconnect for the resistor is pattern plated using a permanent photodielectric layer as a plating mask instead of a sacrificial plating resist. The interconnect can be patterned before or after the PTF resistor ink is printed. The x and z dimensions (width and thickness, respectively) of the resistor are determined by the deposition process, while the y dimension (electrical length) is accurately determined by copper terminations.

    4.
    发明专利
    未知

    公开(公告)号：AT434922T

    公开(公告)日：2009-07-15

    申请号：AT00906973

    申请日：2000-01-20

    Applicant: MOTOROLA INC

    Inventor： LEE TIEN ,  LACH LAWRENCE ,  DUNN GREGORY

    IPC: H05K1/16 ,  H01C1/01 ,  H01C7/00 ,  H01C17/06 ,  H05K3/00 ,  H05K3/46

    Abstract: A thin-film metal resistor (44) suitable for a multilayer printed circuit board (12), and a method for its fabrication. The resistor (44) generally has a multilayer construction, with the individual layers (34, 38) of the resistor (44) being self-aligned with each other so that a negative mutual inductance is produced that very nearly cancels out the self-inductance of each resistor layer (34, 38). As a result, the resistor (44) has a very low net parasitic inductance. In addition, the multilayer construction of the resistor (44) reduces the area of the circuit board (12) required to accommodate the resistor (44), and as a result reduces the problem of parasitic interactions with other circuit elements on other layers of the circuit board (12).

    5.
    发明专利
    未知

    公开(公告)号：AT378799T

    公开(公告)日：2007-11-15

    申请号：AT99964048

    申请日：1999-12-02

    Applicant: MOTOROLA INC

    Inventor： DUNN GREGORY ,  SAVIC JOVICA ,  BEUHLER ALLYSON ,  ZHANG MIN-XIAN ,  SIMONS EVERETT

    IPC: H01G4/33 ,  H05K1/16 ,  H01G4/10 ,  H01L21/822 ,  H01L27/04 ,  H05K3/00 ,  H05K3/06 ,  H05K3/46

    Abstract: A method for manufacturing a microelectronic assembly to have aligned conductive regions and dielectric regions with desirable processing and dimensional characteristics. The invention is particularly useful for producing integral capacitors, with the desired processing and dimensional characteristics achieved with the invention yielding predictable electrical characteristics for the capacitors. The method generally entails providing a substrate with a first conductive layer, forming a dielectric layer on the first conductive layer, and then forming a second conductive layer on the dielectric layer. A first region of the second conductive layer is then removed to expose a first region of the dielectric layer, which in turn is removed to expose a first region of the first conductive layer that is also removed. From this process, the first regions of the conductive and dielectric layers are each removed by using the overlying layer or layers as a mask, so that the remaining second regions of these layers are coextensive.

    6.
    发明专利
    未知

    公开(公告)号：AT377342T

    公开(公告)日：2007-11-15

    申请号：AT00923062

    申请日：2000-01-18

    Applicant: MOTOROLA INC

    Inventor： DUNN GREGORY ,  ZHANG MIN-XIAN ,  SAVIC JOHN

    IPC: H05K1/16 ,  H01C1/032 ,  H01C7/00 ,  H01C17/06 ,  H01L21/302 ,  H05K1/09 ,  H05K3/38

    Abstract: Printed circuit boards with integral high and low value resistors are efficiently produced. The method of their manufacture entails applying a first layer of a low resistance material onto a dielectric substrate in a predetermined thickness and pattern. The pattern defines the electrical lengths and widths of low value resistors, as well as pairs of terminal electrode pads for the high value resistors. A second layer of a high resistance material is applied between and in contact with the top surfaces of the facing ends of each member of the terminal pad pairs. The fixed lengths, widths and thicknesses of the patterned high resistance material determine the values of the high value resistors. Conductive metal terminals are provided at the ends of the low value resistors and at the distal ends of the high value resistor pad pairs to complete the resistors.

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