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公开(公告)号：DE60036907T2
公开(公告)日：2008-08-07
申请号：DE60036907
申请日：2000-01-18
Applicant: MOTOROLA INC
Inventor： DUNN GREGORY J , ZHANG MIN-XIAN , SAVIC JOHN
Abstract: Printed circuit boards with integral high and low value resistors are efficiently produced. The method of their manufacture entails applying a first layer of a low resistance material onto a dielectric substrate in a predetermined thickness and pattern. The pattern defines the electrical lengths and widths of low value resistors, as well as pairs of terminal electrode pads for the high value resistors. A second layer of a high resistance material is applied between and in contact with the top surfaces of the facing ends of each member of the terminal pad pairs. The fixed lengths, widths and thicknesses of the patterned high resistance material determine the values of the high value resistors. Conductive metal terminals are provided at the ends of the low value resistors and at the distal ends of the high value resistor pad pairs to complete the resistors.
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公开(公告)号：DE69937561D1
公开(公告)日：2007-12-27
申请号：DE69937561
申请日：1999-12-02
Applicant: MOTOROLA INC
Inventor： DUNN GREGORY J , SAVIC JOVICA , BEUHLER ALLYSON , ZHANG MIN-XIAN , SIMONS EVERETT
Abstract: A method for manufacturing a microelectronic assembly to have aligned conductive regions and dielectric regions with desirable processing and dimensional characteristics. The invention is particularly useful for producing integral capacitors, with the desired processing and dimensional characteristics achieved with the invention yielding predictable electrical characteristics for the capacitors. The method generally entails providing a substrate with a first conductive layer, forming a dielectric layer on the first conductive layer, and then forming a second conductive layer on the dielectric layer. A first region of the second conductive layer is then removed to expose a first region of the dielectric layer, which in turn is removed to expose a first region of the first conductive layer that is also removed. From this process, the first regions of the conductive and dielectric layers are each removed by using the overlying layer or layers as a mask, so that the remaining second regions of these layers are coextensive.
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公开(公告)号：DE69937561T2
公开(公告)日：2008-09-04
申请号：DE69937561
申请日：1999-12-02
Applicant: MOTOROLA INC
Inventor： DUNN GREGORY J , SAVIC JOVICA , BEUHLER ALLYSON , ZHANG MIN-XIAN , SIMONS EVERETT
Abstract: A method for manufacturing a microelectronic assembly to have aligned conductive regions and dielectric regions with desirable processing and dimensional characteristics. The invention is particularly useful for producing integral capacitors, with the desired processing and dimensional characteristics achieved with the invention yielding predictable electrical characteristics for the capacitors. The method generally entails providing a substrate with a first conductive layer, forming a dielectric layer on the first conductive layer, and then forming a second conductive layer on the dielectric layer. A first region of the second conductive layer is then removed to expose a first region of the dielectric layer, which in turn is removed to expose a first region of the first conductive layer that is also removed. From this process, the first regions of the conductive and dielectric layers are each removed by using the overlying layer or layers as a mask, so that the remaining second regions of these layers are coextensive.
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公开(公告)号：AT377342T
公开(公告)日：2007-11-15
申请号：AT00923062
申请日：2000-01-18
Applicant: MOTOROLA INC
Inventor： DUNN GREGORY , ZHANG MIN-XIAN , SAVIC JOHN
Abstract: Printed circuit boards with integral high and low value resistors are efficiently produced. The method of their manufacture entails applying a first layer of a low resistance material onto a dielectric substrate in a predetermined thickness and pattern. The pattern defines the electrical lengths and widths of low value resistors, as well as pairs of terminal electrode pads for the high value resistors. A second layer of a high resistance material is applied between and in contact with the top surfaces of the facing ends of each member of the terminal pad pairs. The fixed lengths, widths and thicknesses of the patterned high resistance material determine the values of the high value resistors. Conductive metal terminals are provided at the ends of the low value resistors and at the distal ends of the high value resistor pad pairs to complete the resistors.
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公开(公告)号：AU2003297348A8
公开(公告)日：2004-07-29
申请号：AU2003297348
申请日：2003-12-18
Applicant: MOTOROLA INC
Inventor： BRAZIS PAUL , ZHANG MIN-XIAN , ZHANG JIE , KALYANASUNDARAM KRISHNA , GAMOTA DANIEL
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Patent Agency Ranking
公开(公告)号：DE60036907D1
公开(公告)日：2007-12-13
申请号：DE60036907
申请日：2000-01-18
Applicant: MOTOROLA INC
Inventor： DUNN GREGORY J , ZHANG MIN-XIAN , SAVIC JOHN
Abstract: Printed circuit boards with integral high and low value resistors are efficiently produced. The method of their manufacture entails applying a first layer of a low resistance material onto a dielectric substrate in a predetermined thickness and pattern. The pattern defines the electrical lengths and widths of low value resistors, as well as pairs of terminal electrode pads for the high value resistors. A second layer of a high resistance material is applied between and in contact with the top surfaces of the facing ends of each member of the terminal pad pairs. The fixed lengths, widths and thicknesses of the patterned high resistance material determine the values of the high value resistors. Conductive metal terminals are provided at the ends of the low value resistors and at the distal ends of the high value resistor pad pairs to complete the resistors.
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公开(公告)号：AT378799T
公开(公告)日：2007-11-15
申请号：AT99964048
申请日：1999-12-02
Applicant: MOTOROLA INC
Inventor： DUNN GREGORY , SAVIC JOVICA , BEUHLER ALLYSON , ZHANG MIN-XIAN , SIMONS EVERETT
Abstract: A method for manufacturing a microelectronic assembly to have aligned conductive regions and dielectric regions with desirable processing and dimensional characteristics. The invention is particularly useful for producing integral capacitors, with the desired processing and dimensional characteristics achieved with the invention yielding predictable electrical characteristics for the capacitors. The method generally entails providing a substrate with a first conductive layer, forming a dielectric layer on the first conductive layer, and then forming a second conductive layer on the dielectric layer. A first region of the second conductive layer is then removed to expose a first region of the dielectric layer, which in turn is removed to expose a first region of the first conductive layer that is also removed. From this process, the first regions of the conductive and dielectric layers are each removed by using the overlying layer or layers as a mask, so that the remaining second regions of these layers are coextensive.
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公开(公告)号：AU2003297348A1
公开(公告)日：2004-07-29
申请号：AU2003297348
申请日：2003-12-18
Applicant: MOTOROLA INC
Inventor： ZHANG JIE , GAMOTA DANIEL , ZHANG MIN-XIAN , BRAZIS PAUL , KALYANASUNDARAM KRISHNA
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公开(公告)号：WO2004061906A3
公开(公告)日：2005-06-23
申请号：PCT/US0340469
申请日：2003-12-18
Applicant: MOTOROLA INC
Inventor： ZHANG JIE , GAMOTA DANIEL , ZHANG MIN-XIAN , BRAZIS PAUL , KALYANASUNDARAM KRISHNA
CPC classification number: H01L51/0516 , H01L51/0024 , H01L51/0036 , H01L51/0051 , H01L51/0078 , H01L51/0084
Abstract: Organic field effect transistors (OFETs) can be created rapidly and at low cost on organic films by using a multilayer film (202) that has an electrically conducting layer (204, 206) on each side of a dielectric core. The electrically conducting layer is patterned to form gate electrodes (214), and a polymer film (223) is attached onto the gate electrode side of the multilayer dielectric film, using heat and pressure (225) or an adhesive layer (228). A source electrode and a drain electrode (236) are then fashioned on the remaining side of the multilayer dielectric film, and an organic semiconductor (247) is deposited over the source and drain electrodes, so as to fill the gap between the source and drain electrodes and touch a portion of the dielectric film to create an organic field effect transistor.
Abstract translation: 有机场效应晶体管（OFET）可以通过使用在介质芯的每一侧上具有导电层（204,206）的多层膜（202）在有机膜上快速且低成本地产生。 图案化导电层以形成栅电极（214），并且使用热和压力（225）或粘合剂层（228）将聚合物膜（223）附着到多层电介质膜的栅电极侧。 然后在多层电介质膜的剩余侧上形成源电极和漏电极（236），并且在源电极和漏电极上沉积有机半导体（247），以填充源极和漏极之间的间隙 电极并且接触电介质膜的一部分以产生有机场效应晶体管。
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10.发明公开PHOTODEFINED INTEGRAL CAPACITOR WITH SELF-ALIGNED DIELECTRIC AND ELECTRODES AND METHOD THEREFOR 有权光刻制成，具有自对准垫和电介质集成电容器
公开(公告)号：EP1090401A4
公开(公告)日：2004-04-28
申请号：EP99964048
申请日：1999-12-02
Applicant: MOTOROLA INC
Inventor： DUNN GREGORY J , SAVIC JOVICA , BEUHLER ALLYSON , ZHANG MIN-XIAN , SIMONS EVERETT
CPC classification number: H05K1/162 , H05K3/0023 , H05K3/064 , H05K3/4644 , H05K3/4652 , H05K2201/0187 , H05K2201/09509 , Y10T29/435 , Y10T29/49155 , Y10T29/49165
Abstract: A method for manufacturing a microelectronic assembly to have aligned conductive regions and dielectric regions, for example, for producing integral capacitors (32), generally entails providing a substrate (10) with a first conductive layer (12), forming a dielectric layer (14) on the first conductive layer, and then forming a second conductive layer on the dielectric layer (16). A first region of the second conductive layer is then removed to expose a first region of the dielectric layer, which in turn is removed to expose a first region of the first conductive layer that is also removed. From this process, the first regions of the conductive and dielectric layers are each removed by using the overlying layer or layers as a mask, so that the remaining second regions of these layers are coextensive.
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