公开(公告)号：KR20120091406A

公开(公告)日：2012-08-17

申请号：KR20127016879

申请日：2009-03-07

Applicant: QUALCOMM INC

Inventor： CHAUDHURI ARUNAVA ,  YAO IWEN ,  LIN JEREMY H ,  GURSKI REMI ,  YEN KEVIN W

IPC: G06F15/78 ,  G06F9/48

CPC classification number: G06F9/3879 ,  G06F15/7814

Abstract: 플렉시블하고 재구성가능한 디지털 시스템(예를 들어, 무선 모뎀)은 서브회로들의 세트를 포함한다. 각각의 서브회로는 태스크 매니저 및 데이터 스트림에 대해 한 타입의 동작을 수행하기 위한 소정량의 구성가능한 하드웨어 회로를 포함한다. 서브회로의 태스크 매니저는 서브회로의 구성가능한 하드웨어를 구성 및 제어할 수 있다. 중앙 프로세서는 강결합 메모리 내에 태스크 리스트들의 세트를 유지함으로써 서브회로들의 동작을 구성 및 조작한다. 각각의 태스크 리스트는 대응하는 서브회로에 대한 태스크 명령들을 포함한다. 서브회로의 태스크 매니저는 그것의 태스크 리스트로부터 태스크 명령들을 판독하고, 상기 명령들에 의해 지시되는 바와 같은 그것의 연관된 하드웨어 회로를 제어한다. 타임스탬프 태스크 명령 및 푸시 태스크 명령 및 태스크 리스트 아키텍처는 모뎀 서브회로들로 하여금 제 1 무선 인터페이스 표준 또는 제 2 무선 인터페이스 표준에 따라 동작하도록 용이하게 재구성되게 한다.

公开(公告)号：KR20120034138A

公开(公告)日：2012-04-09

申请号：KR20127006989

申请日：2009-03-25

Applicant: QUALCOMM INC

Inventor： CHAUDHURI ARUNAVA ,  SAMPATH HEMANTH ,  CHALLA RAGHU N ,  PALANKI RAVI ,  KANDUKURI NARAYANA SUNIL KUMAR

IPC: H04L1/16 ,  H04L27/00

CPC classification number: H04L1/20 ,  H04L1/1607 ,  H04L1/208

Abstract: 무선 통신 시스템에서 확인응답 메시지를 전송하기 위한 방법이 개시된다. 제 1 신호는 송신기로부터 제 2 신호가 수신되기 이전에 수신된다. 디코딩된 제 1 데이터는 제 1 신호로부터 추출된다. 제 3 신호는 디코딩된 제 1 데이터를 인코딩하고 변조함으로써 생성된다. 제 2 신호는 제 2 심벌들을 생성하기위해 복조된다. 제 3 신호 및 제 2 심벌들은 코릴레이팅된다.

公开(公告)号：MXPA06001138A

公开(公告)日：2006-04-24

申请号：MXPA06001138

申请日：2004-07-28

Applicant: QUALCOMM INC

Inventor： CHAUDHURI ARUNAVA

IPC: H04L1/00 ,  H04L1/18 ,  H04L1/20 ,  H04L25/06

Abstract: Se aplica el factor de escala, cuantifica, y aplica el nuevo factor de escala a las metricas programables para rafagas multiples transmitidas a tiempos diferentes para un paquete de datos anterior a la decodificacion; a medida que se recibe cada rafaga, se les aplica el factor de escala a las metricas programables de entrada para la rafaga con un factor de escala S(i), cuantificadas en base a un factor de escala de cuantificacion Q(i), y almacenadas en la proteccion secundaria; se calcula un factor de escala y factor de escala de cuantificacion en base a las estadisticas para la rafaga; despues que se han recibido todas las rafagas para el paquete de datos, se le aplica el nuevo factor de escala a las metricas programabas cuantificadas para cada rafaga en base al factor de escala de cuantificacion Q(i) para esa rafaga y un factor de escala comun para ponderar apropiadamente las metricas programables en el procedimiento de decodificacion; se determina el factor de escala comun en base a los factores de escala de cuantificacion Q(i) para todas las rafagas; se les aplica el nuevo factor de escala, desintercalan, y decodifican las metricas programables aplicadas con el nuevo factor de escala para todas las rafagas para obtener los datos decodificados para el paquete.

公开(公告)号：AU1078901A

公开(公告)日：2001-04-23

申请号：AU1078901

申请日：2000-10-11

Applicant: QUALCOMM INC

Inventor： CHAUDHURI ARUNAVA

IPC: H04Q9/00 ,  G08C23/04 ,  H04B1/20 ,  H04B7/26 ,  H04M1/27 ,  H04M1/725 ,  H04M11/00

Abstract: A system (101) and method (201, 301) for controlling appliances (102) remotely with a wireless telephone (104). In the system (101), a plurality of appliances (102) are configured for the reception of remote control commands via a wireless link (105) and wireless signal ports (106). The remote control commands are generated in the wireless telephone (104) and transmitted from wireless signal port (103) on the wireless telephone (104) via a wireless link (105). The wireless telephone (104) may also comprise a personal digital assistant or a combination wireless telephone and personal digital assistant. In the method (201), the wireless telephone (104) starts in an idle (state (202). A user then issues an audio command (203), the wireless telephone (104) determines what the corresponding remote control command is (204), and transmits the remote control command to the appliances (205). The wireless telephone (104) then returns to the idle state (206). In the method (301), the wireless telephone may also start in the call state (302). A user then switches to the remote state (303) and issues an audio command (304). The wireless telephone (104) determines what the corresponding remote control command is (305), transmits the remote control command to the appliances (306), and waits for a period of time to determine if another voice command has been issued (307). If another voice command is issued, the wireless telephone (104) determines what the corresponding remote control command is (204) and steps through the following steps as before. If another voice command is not issued, the wireless telephone (104) may switch back to the call state (308).

公开(公告)号：MX2007000262A

公开(公告)日：2007-04-02

申请号：MX2007000262

申请日：2005-06-28

Applicant: QUALCOMM INC

Inventor： CHAUDHURI ARUNAVA ,  LAI KUEI-CHIANG

IPC: H04L27/00

Abstract: Una senal recibida de modulacion de fase continua (CPM), (la cual se forma con un conjunto de funciones de conformacion de impulso) se aproxima a una senal modulada de manipulacion por desplazamiento de fase (PSK), (la cual se forma solo con la funcion dominante de conformacion de impulso que tienen la energia mas grande); la estimacion de canal y la deteccion de datos se llevan a cabo de conformidad con la aproximacion CPM-a-PSK; la senal CPM recibida recibe una senal de potencia estimada y un ruido de potencia estimado y tiene errores debido a la aproximacion CPM-a-PSK; se determina la diferencia ? entre la energia de la funcion de conformacion de impulso dominante y las funciones de conformacion de impulso restantes; se estima una aproximacion de error basada en la estimacion de senal de potencia y la diferencia ?; se calcula una estimacion C/I para la senal CPM recibida con base en la estimacion de senal de potencia, la estimacion ruido de potencia y la estimacion de aproximacion de error.

公开(公告)号：BRPI0415132A

公开(公告)日：2006-11-28

申请号：BRPI0415132

申请日：2004-10-07

Applicant: QUALCOMM INC

Inventor： RICK ROLAND R ,  CHAUDHURI ARUNAVA

IPC: H04L27/00 ,  H04L27/06

Abstract: A wireless communication device (WCD) estimates frequency error by averaging frequency error estimates over multiple integration lengths to generate short-term and long-term averages. The WCD compares the short-term and long-term averages with short-term and long-term thresholds. The long-term thresholds are lower than the short-term threshold. If the average for any integration length exceeds its respective threshold, a frequency offset is determined and an oscillator frequency is adjusted based on that frequency offset. The use of both short-term and long-term thresholds facilitates responding quickly to relatively large changes in the frequency error, while ignoring smaller changes that may be indicative of noise in the system rather than actual changes in the frequency error.

公开(公告)号：WO2009123838A3

公开(公告)日：2009-12-10

申请号：PCT/US2009036709

申请日：2009-03-10

Applicant: QUALCOMM INC ,  ZANOTELLI JOSEPH V ,  NATH MRINAL M ,  CHAUDHURI ARUNAVA ,  GHOSH KAUSHIK ,  CHALLA RAGHU N ,  JING WEIHONG

Inventor： ZANOTELLI JOSEPH V ,  NATH MRINAL M ,  CHAUDHURI ARUNAVA ,  GHOSH KAUSHIK ,  CHALLA RAGHU N ,  JING WEIHONG

IPC: H04L1/00 ,  G06F9/38 ,  H03M13/29 ,  H04N7/26

CPC classification number: H04L1/0045 ,  H03M13/2957 ,  H03M13/41 ,  H03M13/6508 ,  H03M13/6561 ,  H04L1/0052

Abstract: A configurable decoder within a receiver (for example, within a wireless communication device) includes numerous decoders. In one mode, the multiple decoders are used to decode different sub-packets of a packet. When one decoder completes decoding the last sub-packet assigned to it of the packet, then that decoder generates a packet done indication. A control circuit receives the packet done indications, and when all the decoders have generated packet done indications then the control circuit initiates an action. In one example, the action is the interrupting of a processor. The processor responds by reading status information from the control circuit, thereby resetting the interrupt. End-of-packet markers are usable to generate packet done indications and to generate EOP interrupts. Similarly, end-of-group markers are usable to generate group done indications and to generate EOG interrupts. The decoder block is configurable to process sub-packets of a packet using either one or multiple decoders.

Abstract translation: 接收机内的可配置解码器（例如，在无线通信设备内）包括许多解码器。 在一种模式中，多个解码器用于解码分组的不同子分组。 当一个解码器完成对分组给它的最后一个子分组的解码时，该解码器产生分组完成指示。 控制电路接收分组完成指示，并且当所有解码器已经生成分组完成指示时，控制电路启动动作。 在一个示例中，动作是处理器的中断。 处理器通过从控制电路读取状态信息进行响应，从而复位中断。 分组结束标记可用于生成分组完成指示并产生EOP中断。 类似地，组尾标记可用于生成组完成指示并产生EOG中断。 解码器块可配置为使用一个或多个解码器来处理分组的子分组。

公开(公告)号：WO2009120479A3

公开(公告)日：2010-01-14

申请号：PCT/US2009036437

申请日：2009-03-07

Applicant: QUALCOMM INC ,  CHAUDHURI ARUNAVA ,  YAO IWEN ,  LIN JEREMY H ,  GURSKI REMI ,  YEN KEVIN W

Inventor： CHAUDHURI ARUNAVA ,  YAO IWEN ,  LIN JEREMY H ,  GURSKI REMI ,  YEN KEVIN W

IPC: G06F15/78 ,  G06F9/30 ,  G06F9/38 ,  G06F9/48 ,  H04M1/725

CPC classification number: G06F9/3879 ,  G06F15/7814

Abstract: A flexible and reconf?gurable digital system (for example, a wireless modem) includes a set of sub-circuits. Each sub-circuit includes a task manager and an amount of configurable hardware circuitry for performing a type of operation on a data stream. The task manager of a sub-circuit can configure and control the configurable hardware of the sub-circuit. A central processor configures and orchestrates operation of the sub- circuits by maintaining a set of task lists in a tightly coupled memory. Each task list includes task instructions for a corresponding sub-circuit. The task manager of a sub- circuit reads task instructions from its task list and controls its associated hardware circuitry as directed by the instructions. A timestamp task instruction and a push task instruction and the task list architecture allow modem sub-circuits to be easily reconfigured to operate in accordance with either a first air interface standard or a second air interface standard.

Abstract translation: 灵活和可重构的数字系统（例如，无线调制解调器）包括一组子电路。 每个子电路包括任务管理器和用于对数据流执行一种操作的可配置硬件电路的量。 子电路的任务管理器可以配置和控制子电路的可配置硬件。 中央处理器通过在紧耦合的存储器中维护一组任务列表来配置和协调子电路的操作。 每个任务列表包括相应子电路的任务指令。 子电路任务管理器从其任务列表中读取任务指令，并根据指令控制其相关的硬件电路。 时间戳任务指令和推送任务指令以及任务列表架构允许将调制解调器子电路轻松地重新配置为根据第一空中接口标准或第二空中接口标准进行操作。

公开(公告)号：WO2009142804A2

公开(公告)日：2009-11-26

申请号：PCT/US2009037438

申请日：2009-03-17

Applicant: QUALCOMM INC ,  BUDIANU PETRU CRISTIAN ,  CHAUDHURI ARUNAVA ,  CHALLA RAGHU N

Inventor： BUDIANU PETRU CRISTIAN ,  CHAUDHURI ARUNAVA ,  CHALLA RAGHU N

IPC: H04J11/00 ,  H04K1/10

CPC classification number: H04L25/0202 ,  H04B1/76 ,  H04J11/00 ,  H04L25/0212 ,  H04L25/023 ,  H04L25/0232

Abstract: Within a receiver, a channel estimation mechanism involves a hardware interpolator. In a first mode, narrowband pilot values are analyzed to generate channel parameters that are supplied to the interpolator such that the interpolator generates channel estimate values. The channel estimate values are used to demodulate a tile of a frame. In a second mode, broadband pilot values are supplied to an IFFT, thereby generating time domain values. After time domain processing, an FFT is employed to generate intermediate channel estimate values. These intermediate values are analyzed to determine channel parameters, which in turn are supplied to the hardware interpolator so that the interpolator generates a larger number of channel estimate values. After phase adjustment, the channel estimate values are used in demodulation. Use of the interpolator in the broadband mode allows the FFT employed to be of a smaller order, and to consume less power and/or processing resources.

Abstract translation: 在接收机内，信道估计机制涉及硬件插值器。 在第一模式中，分析窄带导频值以产生提供给内插器的信道参数，使得内插器生成信道估计值。 信道估计值用于解调帧的瓦片。 在第二模式中，宽带导频值被提供给IFFT，从而产生时域值。 在时域处理之后，采用FFT来产生中间信道估计值。 分析这些中间值以确定信道参数，其又被提供给硬件插值器，使得内插器产生更大数量的信道估计值。 相位调整后，信道估计值用于解调。 在宽带模式下使用内插器允许所采用的FFT具有较小的次序，并且消耗更少的功率和/或处理资源。

公开(公告)号：WO2009120913A3

公开(公告)日：2011-01-13

申请号：PCT/US2009038473

申请日：2009-03-27

Applicant: QUALCOMM INC ,  CHAUDHURI ARUNAVA ,  SAMPATH HEMANTH ,  YAO IWEN ,  LIN JEREMY H ,  CHALLA RAGHU N ,  WU MIN

Inventor： CHAUDHURI ARUNAVA ,  SAMPATH HEMANTH ,  YAO IWEN ,  LIN JEREMY H ,  CHALLA RAGHU N ,  WU MIN

IPC: G06F17/14

CPC classification number: G06F17/142 ,  H04L5/0007 ,  H04L5/0023 ,  H04L5/0053 ,  H04L27/265 ,  H04L27/2662

Abstract: An improved processing engine for performing Fourier transforms includes an instruction processor configured to process sequential instruction software commands and a Fourier transform engine coupled to the instruction processor. The Fourier transform engine is configured to perform Fourier transforms on a serial stream of data. The Fourier transform engine is configured to receive configuration information and operational data from the instruction processor via a set of software tasks.

Abstract translation: 用于执行傅里叶变换的改进的处理引擎包括配置成处理顺序指令软件命令的指令处理器和耦合到指令处理器的傅里叶变换引擎。 傅立叶变换引擎被配置为对串行数据流执行傅里叶变换。 傅里叶变换引擎被配置为经由一组软件任务从指令处理器接收配置信息和操作数据。