公开(公告)号：DE69122598D1

公开(公告)日：1996-11-14

申请号：DE69122598

申请日：1991-12-18

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： PUZZOLO SANTO ,  ZAMBRANO RAFFAELE ,  PAPARO MARIO

IPC: H01L21/8249 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/06 ,  H01L27/082 ,  H01L29/73 ,  H01L29/732 ,  H01L21/82

Abstract: In the version with unisolated components the components of the structure are totally or partially superimposed on each other, partly in a first epitaxial layer and partly in a second epitaxial layer; the low voltage bipolar transistor is indeed situated above the emitter region of the bipolar power transistor which is thus a completely buried active structure. In the version with isolated components, in an n- epitaxial layer there are two p+ regions, i.e. the first, constituting the power transistor base, encloses the n+ emitter region of said transistor while the second encloses two n+ regions and one p+ region constituting the collector, emitter and base regions respectively of the low voltage transistor. A metallization on the front of the chip provides connection between the collector contact of the low voltage transistor and the emitter contact of the power transistor.

公开(公告)号：DE69122598T2

公开(公告)日：1997-03-06

申请号：DE69122598

申请日：1991-12-18

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： PUZZOLO SANTO ,  ZAMBRANO RAFFAELE ,  PAPARO MARIO

IPC: H01L21/8249 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/06 ,  H01L27/082 ,  H01L29/73 ,  H01L29/732 ,  H01L21/82

Abstract: In the version with unisolated components the components of the structure are totally or partially superimposed on each other, partly in a first epitaxial layer and partly in a second epitaxial layer; the low voltage bipolar transistor is indeed situated above the emitter region of the bipolar power transistor which is thus a completely buried active structure. In the version with isolated components, in an n- epitaxial layer there are two p+ regions, i.e. the first, constituting the power transistor base, encloses the n+ emitter region of said transistor while the second encloses two n+ regions and one p+ region constituting the collector, emitter and base regions respectively of the low voltage transistor. A metallization on the front of the chip provides connection between the collector contact of the low voltage transistor and the emitter contact of the power transistor.

公开(公告)号：IT1246759B

公开(公告)日：1994-11-26

申请号：IT2257790

申请日：1990-12-31

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： PUZZOLO SANTO ,  ZAMBRANO RAFFAELE ,  PAPARO MARIO

IPC: H01L21/8249 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/06 ,  H01L27/082 ,  H01L29/73 ,  H01L29/732 ,  H01L

Abstract: In the version with unisolated components the components of the structure are totally or partially superimposed on each other, partly in a first epitaxial layer and partly in a second epitaxial layer; the low voltage bipolar transistor is indeed situated above the emitter region of the bipolar power transistor which is thus a completely buried active structure. In the version with isolated components, in an n- epitaxial layer there are two p+ regions, i.e. the first, constituting the power transistor base, encloses the n+ emitter region of said transistor while the second encloses two n+ regions and one p+ region constituting the collector, emitter and base regions respectively of the low voltage transistor. A metallization on the front of the chip provides connection between the collector contact of the low voltage transistor and the emitter contact of the power transistor.

公开(公告)号：IT9022577A1

公开(公告)日：1992-07-01

申请号：IT2257790

申请日：1990-12-31

Applicant: CONS RIC MICROELETTRONICA ,  SGS THOMSON MICROELECTRONICS

Inventor： PAPARO MARIO ,  PUZZOLO SANTO ,  ZAMBRANO RAFFAELE

IPC: H01L21/8249 ,  H01L20060101 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/06 ,  H01L27/082 ,  H01L29/73 ,  H01L29/732

公开(公告)号：IT9022577D0

公开(公告)日：1990-12-31

申请号：IT2257790

申请日：1990-12-31

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： PUZZOLO SANTO ,  ZAMBRANO RAFFAELE ,  PAPARO MARIO

IPC: H01L21/8249 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/06 ,  H01L27/082 ,  H01L29/73 ,  H01L29/732

Abstract: In the version with unisolated components the components of the structure are totally or partially superimposed on each other, partly in a first epitaxial layer and partly in a second epitaxial layer; the low voltage bipolar transistor is indeed situated above the emitter region of the bipolar power transistor which is thus a completely buried active structure. In the version with isolated components, in an n- epitaxial layer there are two p+ regions, i.e. the first, constituting the power transistor base, encloses the n+ emitter region of said transistor while the second encloses two n+ regions and one p+ region constituting the collector, emitter and base regions respectively of the low voltage transistor. A metallization on the front of the chip provides connection between the collector contact of the low voltage transistor and the emitter contact of the power transistor.