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    SEMICONDUCTOR ELECTRONIC DEVICE PROVIDED WITH DYNAMIC INSULATION CIRCUIT
    1.
    发明专利
    SEMICONDUCTOR ELECTRONIC DEVICE PROVIDED WITH DYNAMIC INSULATION CIRCUIT 失效

    公开(公告)号：JPH06132538A

    公开(公告)日：1994-05-13

    申请号：JP32551992

    申请日：1992-12-04

    Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

    Inventor： PAPARO MARIO ,  ZAMBRANO RAFFAELE

    IPC: H01L29/78 ,  H01L21/76 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06 ,  H01L27/08 ,  H01L27/088 ,  H01L29/784

    Abstract: PURPOSE: To allow a dynamic insulating circuit-equipped control circuit of a semiconductor electronic device to reliably keep the semiconductor electronic device insulated even in a negatively charged transient state. CONSTITUTION: A switch S1 connects an insulating region to a ground. A switch S2 connects the insulating region to a collector or drain of a power transistor. A switch S3 connects the insulating region to a control circuit transistor region. A dynamic insulating circuit of a control circuit is constructed of a driving circuit CPI. Such dynamic insulating circuit closes the switch S1 when the potential of the ground or insulating region is lower than the voltage of the collector or drain of the power transistor or the potential of the control circuit region, closes the switch S2 and opens the switch S1 simultaneously when the voltage of the collector or drain of the power transistor is lower than the potential of the ground or insulating region, and closes the switch S3 and opens the switch S1 simultaneously when the potential of the control circuit region is lower than the potential of the ground or insulating region.

    3.
    发明专利
    未知

    公开(公告)号：DE69122598T2

    公开(公告)日：1997-03-06

    申请号：DE69122598

    申请日：1991-12-18

    Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

    Inventor： PUZZOLO SANTO ,  ZAMBRANO RAFFAELE ,  PAPARO MARIO

    IPC: H01L21/8249 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/06 ,  H01L27/082 ,  H01L29/73 ,  H01L29/732 ,  H01L21/82

    Abstract: In the version with unisolated components the components of the structure are totally or partially superimposed on each other, partly in a first epitaxial layer and partly in a second epitaxial layer; the low voltage bipolar transistor is indeed situated above the emitter region of the bipolar power transistor which is thus a completely buried active structure. In the version with isolated components, in an n- epitaxial layer there are two p+ regions, i.e. the first, constituting the power transistor base, encloses the n+ emitter region of said transistor while the second encloses two n+ regions and one p+ region constituting the collector, emitter and base regions respectively of the low voltage transistor. A metallization on the front of the chip provides connection between the collector contact of the low voltage transistor and the emitter contact of the power transistor.

    5.
    发明专利
    未知

    公开(公告)号：DE69122598D1

    公开(公告)日：1996-11-14

    申请号：DE69122598

    申请日：1991-12-18

    Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

    Inventor： PUZZOLO SANTO ,  ZAMBRANO RAFFAELE ,  PAPARO MARIO

    IPC: H01L21/8249 ,  H01L21/331 ,  H01L21/8222 ,  H01L27/06 ,  H01L27/082 ,  H01L29/73 ,  H01L29/732 ,  H01L21/82

    Abstract: In the version with unisolated components the components of the structure are totally or partially superimposed on each other, partly in a first epitaxial layer and partly in a second epitaxial layer; the low voltage bipolar transistor is indeed situated above the emitter region of the bipolar power transistor which is thus a completely buried active structure. In the version with isolated components, in an n- epitaxial layer there are two p+ regions, i.e. the first, constituting the power transistor base, encloses the n+ emitter region of said transistor while the second encloses two n+ regions and one p+ region constituting the collector, emitter and base regions respectively of the low voltage transistor. A metallization on the front of the chip provides connection between the collector contact of the low voltage transistor and the emitter contact of the power transistor.

    6.
    发明专利
    未知

    公开(公告)号：DE69213675D1

    公开(公告)日：1996-10-17

    申请号：DE69213675

    申请日：1992-11-27

    Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

    Inventor： PAPARO MARIO ,  ZAMBRANO RAFFAELE

    IPC: H01L29/78 ,  H01L21/76 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06 ,  H01L27/08 ,  H01L27/088

    Abstract: In the device there are present a first, second and third switch designed to connect a node of the insulation region with a ground node, the collector or drain of the power transistor and a region of a control circuit transistor respectively. The dynamic insulation circuit of the control circuit comprises a pilot circuit which controls: closing of the first switch when the potential of the ground node (or insulation region) is less than the potential of the collector or drain region of the power transistor and the potential of the control circuit region, closing of the second switch and opening of the first when the potential of the collector or drain region of the power transistor is less than the potential of the ground node (or the insulation region), closing of the third switch and opening of the first when the potential of said control circuit region is less than the potential of the ground node (or the insulation region).

    7.
    发明专利
    未知

    公开(公告)号：IT1292096B1

    公开(公告)日：1999-01-25

    申请号：ITMI971333

    申请日：1997-06-05

    Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

    Inventor： SIRNA GUGLIELMO ,  PALMISANO GIUSEPPE ,  PAPARO MARIO

    IPC: H03K19/018

    Abstract: A high-speed bipolar-to-CMOS logic converter circuit, including an input stage, including a differential amplifier meant to be connected to a bipolar-logic circuit portion and to be supplied by the supply voltage of the bipolar-logic portion, and an output stage, which is supplied by the voltage of a CMOS-logic circuit portion, a dynamic level shifting circuit interposed between the input stage and the output stage, the output stage being connected to the CMOS-logic circuit portion.

    8.
    发明专利
    未知

    公开(公告)号：DE69213675T2

    公开(公告)日：1997-02-27

    申请号：DE69213675

    申请日：1992-11-27

    Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

    Inventor： PAPARO MARIO ,  ZAMBRANO RAFFAELE

    IPC: H01L29/78 ,  H01L21/76 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06 ,  H01L27/08 ,  H01L27/088

    Abstract: In the device there are present a first, second and third switch designed to connect a node of the insulation region with a ground node, the collector or drain of the power transistor and a region of a control circuit transistor respectively. The dynamic insulation circuit of the control circuit comprises a pilot circuit which controls: closing of the first switch when the potential of the ground node (or insulation region) is less than the potential of the collector or drain region of the power transistor and the potential of the control circuit region, closing of the second switch and opening of the first when the potential of the collector or drain region of the power transistor is less than the potential of the ground node (or the insulation region), closing of the third switch and opening of the first when the potential of said control circuit region is less than the potential of the ground node (or the insulation region).

    9.
    发明专利
    未知

    公开(公告)号：ITMI913265D0

    公开(公告)日：1991-12-05

    申请号：ITMI913265

    申请日：1991-12-05

    Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

    Inventor： PAPARO MARIO ,  ZAMBRANO RAFFAELE

    IPC: H01L29/78 ,  H01L21/76 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06 ,  H01L27/08 ,  H01L27/088

    Abstract: In the device there are present a first, second and third switch designed to connect a node of the insulation region with a ground node, the collector or drain of the power transistor and a region of a control circuit transistor respectively. The dynamic insulation circuit of the control circuit comprises a pilot circuit which controls: closing of the first switch when the potential of the ground node (or insulation region) is less than the potential of the collector or drain region of the power transistor and the potential of the control circuit region, closing of the second switch and opening of the first when the potential of the collector or drain region of the power transistor is less than the potential of the ground node (or the insulation region), closing of the third switch and opening of the first when the potential of said control circuit region is less than the potential of the ground node (or the insulation region).

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