公开(公告)号：DE68921004D1

公开(公告)日：1995-03-16

申请号：DE68921004

申请日：1989-11-17

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： ZISA MICHELE ,  SCILLA GIUSEPPE ,  PALARA SERGIO

IPC: H01L29/78 ,  H01L27/02 ,  H01L27/04 ,  H03K17/08 ,  H03K17/082 ,  H03K17/14

Abstract: The device for protection against the short circuit of an MOS-type power device comprises at least one secondary branch circuit (2, 3) arranged in parallel with a main branch circuit (1) which includes the power transistor (T1). The secondary branch (2, 3) includes a control MOS transistor (T2, T3) having the same characteristics as the power transistor (T1) under control and the ability to conduct a current equal to a fraction of that flowing through the power transistor (T1). The gate of the control transistor (T2, T3) is connected directly with that of the power transistor (T1). The secondary branch also includes means (T4, T5, T6, R2, R3) sensitive to temperature which, in the case of a current flow corresponding to the short circuit current of the power transistor (T1), act on the gate common to the control and to the power transistors (T2, T3; T1) so as to lower its voltage and thus limit the conduction of same.

公开(公告)号：DE68921004T2

公开(公告)日：1995-09-21

申请号：DE68921004

申请日：1989-11-17

Applicant: SGS THOMSON MICROELECTRONICS ,  CONS RIC MICROELETTRONICA

Inventor： ZISA MICHELE ,  SCILLA GIUSEPPE ,  PALARA SERGIO

IPC: H01L29/78 ,  H01L27/02 ,  H01L27/04 ,  H03K17/08 ,  H03K17/082 ,  H03K17/14

Abstract: The device for protection against the short circuit of an MOS-type power device comprises at least one secondary branch circuit (2, 3) arranged in parallel with a main branch circuit (1) which includes the power transistor (T1). The secondary branch (2, 3) includes a control MOS transistor (T2, T3) having the same characteristics as the power transistor (T1) under control and the ability to conduct a current equal to a fraction of that flowing through the power transistor (T1). The gate of the control transistor (T2, T3) is connected directly with that of the power transistor (T1). The secondary branch also includes means (T4, T5, T6, R2, R3) sensitive to temperature which, in the case of a current flow corresponding to the short circuit current of the power transistor (T1), act on the gate common to the control and to the power transistors (T2, T3; T1) so as to lower its voltage and thus limit the conduction of same.

公开(公告)号：DE69431521D1

公开(公告)日：2002-11-14

申请号：DE69431521

申请日：1994-10-27

Applicant: CONS RIC MICROELETTRONICA

Inventor： GALLI GIOVANNI ,  SCILLA GIUSEPPE

IPC: H01L27/04 ,  H01L21/822 ,  H01L27/06 ,  H03F1/52 ,  H03K17/08

公开(公告)号：DE69612829D1

公开(公告)日：2001-06-21

申请号：DE69612829

申请日：1996-01-15

Applicant: CONS RIC MICROELETTRONICA

Inventor： CRISCIONE MARCELLO ,  SCILLA GIUSEPPE

IPC: H02M3/07 ,  H02M3/00

Abstract: A voltage booster circuit (30) presenting a pull-up capacitor (48) connected to the supply line (37) via a PMOS switching transistor (46). The other terminal (42) of the pull-up capacitor is supplied with a pull-up voltage (V1) switching between a first value determining charging of the capacitor, and a second value higher than the first and determining pull-up of the capacitor. A negative voltage source (49, 47) presents an output (55) connected to the control terminal of a switch transistor (46), and generates a negative voltage of a value lower than the first pull-up voltage value when charging the capacitor, so as to saturate the switch transistor and charge the capacitor to a voltage close to the supply voltage.

公开(公告)号：DE69431521T2

公开(公告)日：2003-06-05

申请号：DE69431521

申请日：1994-10-27

Applicant: CONS RIC MICROELETTRONICA

Inventor： GALLI GIOVANNI ,  SCILLA GIUSEPPE

IPC: H01L27/04 ,  H01L21/822 ,  H01L27/06 ,  H03F1/52 ,  H03K17/08

公开(公告)号：DE69612829T2

公开(公告)日：2001-09-27

申请号：DE69612829

申请日：1996-01-15

Applicant: CONS RIC MICROELETTRONICA

Inventor： CRISCIONE MARCELLO ,  SCILLA GIUSEPPE

IPC: H02M3/07 ,  H02M3/00

Abstract: A voltage booster circuit (30) presenting a pull-up capacitor (48) connected to the supply line (37) via a PMOS switching transistor (46). The other terminal (42) of the pull-up capacitor is supplied with a pull-up voltage (V1) switching between a first value determining charging of the capacitor, and a second value higher than the first and determining pull-up of the capacitor. A negative voltage source (49, 47) presents an output (55) connected to the control terminal of a switch transistor (46), and generates a negative voltage of a value lower than the first pull-up voltage value when charging the capacitor, so as to saturate the switch transistor and charge the capacitor to a voltage close to the supply voltage.