公开(公告)号：JP2000182956A

公开(公告)日：2000-06-30

申请号：JP35584298

申请日：1998-12-15

Applicant: SONY CORP ,  ST LCD KK

Inventor： KOJIMA AKIRA ,  HAYASHI HISAO

IPC: H01L21/20 ,  H01L21/268 ,  H01L21/336 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To provide a laser crystallization device for a semiconductor thin film which controls crystal orientation. SOLUTION: Related to a laser crystallization device, a semiconductor thin film 4 formed on a substrate 0 is irradiated with laser beam 50 while applied with a magnetic field 25, so that the semiconductor thin film 4 is melted once and crystallized in a cooling process. The laser crystallization device comprises a stage 31 on which the substrate 0 to be processed is placed, a vessel 30 where the stage 31 is housed, a laser light source 51 for generating the laser beam 50, an optical system for guiding the laser beam 50 to the substrate 0 placed on the stage 31, and a magnetic field generating device which applied the unidirectional magnetic field 25 to the entire vessel 30 where the stage 31 and at least a part of the optical system are housed. Here, the semiconductor thin film 4 is irradiated with the laser light 50 for melting once, and the crystal orientation of crystal particles contained in the semiconductor thin film 4 is aligned under the action of unidirectional magnetic field in a cooling process. A unidirectional electric field may be acted instead of magnetic field.

公开(公告)号：DE69112693D1

公开(公告)日：1995-10-12

申请号：DE69112693

申请日：1991-04-24

Applicant: SONY CORP

Inventor： ASAMI YUKIO ,  FUKAZAWA HIROYUKI ,  KOJIMA AKIRA

IPC: B29C45/14 ,  H01L21/56 ,  H01L23/28 ,  H01L23/31 ,  H01L23/495 ,  H01L23/50

Abstract: A semiconductor device is fabricated by placing a semiconductor chip (7) in a lead frame which has no die pad. Electrodes of the chip are connected by bonding wires to respective lead fingers (3). Additionally, the lead frame has movement restricting fingers which limit horizontal movement of the chip within the lead frame during injection of resin into a mould surrounding the chip. Furthermore, the mould has horizontal movement restricting projections (12) to limit vertical movement of the chip within the mould cavity. The restriction on horizontal and vertical movement of the chip reduces the risk of the bonding wires being broken or short circuited during the resin injection process.

公开(公告)号：DE69112693T2

公开(公告)日：1996-02-01

申请号：DE69112693

申请日：1991-04-24

Applicant: SONY CORP

Inventor： ASAMI YUKIO ,  FUKAZAWA HIROYUKI ,  KOJIMA AKIRA

IPC: B29C45/14 ,  H01L21/56 ,  H01L23/28 ,  H01L23/31 ,  H01L23/495 ,  H01L23/50

Abstract: A semiconductor device is fabricated by placing a semiconductor chip (7) in a lead frame which has no die pad. Electrodes of the chip are connected by bonding wires to respective lead fingers (3). Additionally, the lead frame has movement restricting fingers which limit horizontal movement of the chip within the lead frame during injection of resin into a mould surrounding the chip. Furthermore, the mould has horizontal movement restricting projections (12) to limit vertical movement of the chip within the mould cavity. The restriction on horizontal and vertical movement of the chip reduces the risk of the bonding wires being broken or short circuited during the resin injection process.

公开(公告)号：JP2000031106A

公开(公告)日：2000-01-28

申请号：JP20012798

申请日：1998-07-15

Applicant: SONY CORP

Inventor： AIBA TAKESHI ,  NISHIZAKI MITSUHIRO ,  KOJIMA AKIRA

IPC: B08B3/02 ,  H01L21/304

Abstract: PROBLEM TO BE SOLVED: To reduce the size of a substrate treating device. SOLUTION: A substrate treating device is constituted by arranging in a straight live liquid chemical treating units 2 and 4 which treat substrates 1 to be treated with liquid chemicals, treating units 3, 5, and 6 which rinse the substrates 1 with water, and a treating unit 7 which dries the substrates 1, and the substrates 1 are held vertically in the units 2-7. In addition, the device sprays a treating medium on the front and rear surfaces of the vertically held substrates 1, from the nozzles 2a-7a of each unit 2-7 in the unit 2-7.

公开(公告)号：JP2586090B2

公开(公告)日：1997-02-26

申请号：JP7024788

申请日：1988-03-24

Applicant: SONY CORP

Inventor： KOJIMA AKIRA ,  NAKANO SEIJI

IPC: H01L21/56

公开(公告)号：JPH0820046A

公开(公告)日：1996-01-23

申请号：JP17949594

申请日：1994-07-06

Applicant: SONY CORP

Inventor： KOJIMA AKIRA ,  HAYASHI TSUNEYUKI ,  FUKAZAWA HIROYUKI ,  SAITO TAKASHI

IPC: B29C45/26 ,  B29C33/56 ,  B29C45/02 ,  B29C45/14 ,  B29C45/37 ,  B29L31/34

Abstract: PURPOSE:To provide a resin mold capable of achieving the miniaturization of a molding machine due to the reduction of mold clamping load. CONSTITUTION:A resin mold 1 is constituted so that the gate parts 13, 23 constituting a gate are formed from a hard alloy having hardness of 1 or more and at least cavity blocks 11, 22 and a center block 12 excepting the gate parts 13, 23 are formed from an alloy other than an iron hard alloy having hardness of 1 or less, for example, an aluminum or copper hard alloy.

公开(公告)号：JPH05121617A

公开(公告)日：1993-05-18

申请号：JP30666991

申请日：1991-10-25

Applicant: SONY CORP

Inventor： OSAWA KENJI ,  NAGANO MUTSUMI ,  KOJIMA AKIRA ,  ISHIDA KAZUAKI

IPC: H01L21/60 ,  H01L21/321 ,  H01L23/50

Abstract: PURPOSE:To miniaturize an inner lead and a bump by a method wherein third metallic layer is formed on the surface of a second metallic layer furthermore, the first metallic layer is patterned and then the second metallic layer is etched away using first and third metallic layers as masks. CONSTITUTION:A first metallic layer 1 and a second metallic layer 2 are laminated on a lead frame material 3. Next, both sides of the lead frame material 3 are coated with photoresist films 4 and then a third metallic layer 6 comprising copper is formed on the exposed part of the second metallic layer 2 by electrolytic plating step. At this time, a photoresist film 7 on the first metallic layer 1 is exposed and developed to be used as a mask for the formation of an outer lead. Next, the first metallic layer 1 is patterned by etching step using the photoresist film 7 as a mask to form the outer lead 3. Finally, the second metallic layer 2 is etched away using the third metallic layer 6 and the first metallic layer 1 as masks so as to form the title lead frame.

公开(公告)号：JPH0417346A

公开(公告)日：1992-01-22

申请号：JP12149290

申请日：1990-05-11

Applicant: SONY CORP

Inventor： KOJIMA AKIRA ,  OSAWA KENJI

IPC: H01L21/603 ,  H01L21/60 ,  H05K3/32 ,  H05K3/36

Abstract: PURPOSE:To enable time required for connecting an electrode and a lead of a semiconductor chip to be reduced, a thickness of a device to be made thinner, and a pitch of an electrode of the semiconductor chip to be reduced by performing contact bonding of an anisotropic conductive film where a plurality of conductive pattern films are formed on one surface to the electrode and lead of the semiconductor chip. CONSTITUTION:An anisotropic conductive film 7 where a plurality of conductive pattern films 8 for connecting an electrode 6 of a semiconductor chip 4 and an edge part of the corresponding lead 2 are formed on an upper surface is subjected to contact bonding onto the electrode 6 in a position corresponding to the electrode 6 of the semiconductor chip 4 of each conductive pattern film 8 and is subjected to contact bonding onto an edge part of the lead 2 in a position corresponding to an edge part of the lead 2 of each conductive pattern film 8. For example, in the anisotropic conductive film 7, a metal particle such as solder, copper, nickel, etc., or a particle with conductivity which consists of an inorganic material where a metal layer is applied on the surface or an organic material is scattered into a heat-sensitive resin with insulation property. If pressure is applied in thickness direction, electrical conductivity is achieved in thickness direction but insulation property is achieved in face direction.

公开(公告)号：JPH0342847A

公开(公告)日：1991-02-25

申请号：JP17858789

申请日：1989-07-11

Applicant: SONY CORP

Inventor： KOJIMA AKIRA ,  MURAKAMI HIROSHI ,  UCHIYAMA TAKEYOSHI ,  FUKAZAWA HIROYUKI

IPC: H01L21/60

Abstract: PURPOSE:To prevent a short circuit between a wire and a die pad by forming an insulating member around a chip on the chip loading surface of the die pad while connecting the chip and an inner lead by the metallic small-gage wire and sealing the whole surface with a resin. CONSTITUTION:In a die pad 1, on the chip loading surface of a top face of which a chip 2 is placed, a die-pad hanging lead 3 is arranged to the opposed side sections 1a of the die pad 1 while a large number of inner leads 4 are mounted respectively in a mutually symmetric manner centering around the extension of the die-pad hanging lead 3, and a plurality of these inner leads are connected, thus constituting a lead frame. Bonding pads 2a and the inner leads 4 are connected by bonding wires 5, and sealed by a molding resin layer 6. A frame-shaped insulating film 7 is stuck to the chip loading surface of the die pad 1 so as to surround the chip 2 at that time. Accordingly, the hanging of the wires and short circuit among the wires and the die pad are prevented while constraint on the mounting of the die pad and the chip is removed, and the diversified chips can be mounted by using the same lead frame.

公开(公告)号：JPS6325505B2

公开(公告)日：1988-05-25

申请号：JP11779779

申请日：1979-09-13

Applicant: SONY CORP

Inventor： AKYAMA KATSUHIKO ,  TAKAHASHI HIDEYUKI ,  OKAYAMA MASAKI ,  TSUCHIDA SHUJI ,  KOJIMA AKIRA ,  SUZUKI NORIO

IPC: H01L21/265 ,  H01L21/312 ,  H01L21/3205 ,  H01L21/822 ,  H01L27/04