公开(公告)号：FR2806529B1

公开(公告)日：2005-03-04

申请号：FR0003260

申请日：2000-03-14

Applicant: ST MICROELECTRONICS SA

Inventor： DELL OVA FRANCIS ,  RIZZO PIERRE ,  LHERMET FRANK ,  POIROT DOMINIQUE ,  RAYON STEPHANE ,  GOMEZ BERTRAND ,  LESSOILE NICOLE

IPC: H01L21/66 ,  H01L23/66 ,  H01L21/283 ,  H05K13/00

公开(公告)号：DE602006016463D1

公开(公告)日：2010-10-07

申请号：DE602006016463

申请日：2006-09-01

Applicant: ST MICROELECTRONICS SA

Inventor： MANI CHRISTOPHE ,  DELL OVA FRANCIS ,  RIZZO PIERRE

IPC: G06K7/00 ,  G06K19/07

公开(公告)号：FR2806855B1

公开(公告)日：2002-06-21

申请号：FR0003606

申请日：2000-03-21

Applicant: ST MICROELECTRONICS SA

Inventor： RIZZO PIERRE ,  DELL OVA FRANCIS

IPC: H03D1/00 ,  G06K7/00 ,  G06K19/07 ,  H03D1/10 ,  H03K5/08 ,  H04L25/03 ,  H04L25/06 ,  H04L27/06 ,  H03D1/18

Abstract: The invention concerns a demodulator of an amplitude-modulated signal (Vdb), characterised in that it comprises a peak detecting cell (DCR) capable of extracting the reference modulating signal (Vpeak 1 ) of the modulated signal (Vdb); a first demodulator (FE) adapted to detect the peak of the reference modulating signal (Vpeak 1 ) to generate a high comparison threshold and locate the start of the modulation, a second demodulator (RE) adapted to detect a trough of the reference modulating signal (Vpeak 1 ) to generate a low comparison threshold and locate the end of the modulation; a logic processing unit capable of supplying the demodulated signal (Vdemod).

公开(公告)号：FR2806529A1

公开(公告)日：2001-09-21

申请号：FR0003260

申请日：2000-03-14

Applicant: ST MICROELECTRONICS SA

Inventor： DELL OVA FRANCIS ,  RIZZO PIERRE ,  LHERMET FRANK ,  POIROT DOMINIQUE ,  RAYON STEPHANE ,  GOMEZ BERTRAND ,  LESSOILE NICOLE

IPC: H01L21/66 ,  H01L23/66 ,  H01L21/283 ,  H05K13/00

公开(公告)号：FR2892212A1

公开(公告)日：2007-04-20

申请号：FR0510590

申请日：2005-10-17

Applicant: ST MICROELECTRONICS SA

Inventor： MANI CHRISTOPHE ,  DELL OVA FRANCIS ,  RIZZO PIERRE

IPC: G06K7/08 ,  H04B5/00 ,  H04B7/00

Abstract: L'invention concerne un lecteur à couplage inductif (50) comprenant un circuit d'interface passif (16) pour moduler l'impédance d'un circuit d'antenne (13) et extraire du circuit d'antenne un signal de données (SDTr) et un signal d'horloge RF (CK0), et des moyens (DB3) de connexion du lecteur à un module de sécurité amovible (40, 43). Selon l'invention, le lecteur comprend un circuit d'émulation (17) pour ouvrir un canal de communication RF avec un autre lecteur, une liaison électrique non amovible reliant le circuit d'émulation (17) au circuit d'interface passif (16), au moyen de laquelle le signal de données (SDTr) et le signal d'horloge RF (CK0) sont fournis au circuit d'émulation (17), et un bus de données (DB3) cadencé par un signal d'horloge de bus de fréquence inférieure à la fréquence du signal d'horloge RF, pour relier le circuit d'émulation (17) au module de sécurité amovible (40, 43). Avantage : réalisation d'un lecteur à faible consommation électrique.

公开(公告)号：DE69614181D1

公开(公告)日：2001-09-06

申请号：DE69614181

申请日：1996-04-24

Applicant: ST MICROELECTRONICS SA

Inventor： COMMINGES MARTIAL ,  DELL OVA FRANCIS ,  PAILLARDET FREDERIC

IPC: H03M1/74

Abstract: The converter includes a number of MOS transistors with P type channel (MP) connected in parallel through their gates and sources which are connected to a voltage Vcc. A number of MOS transistors with N type channel (MN) are also connected in parallel with their gates and sources, the latter being connected to a voltage GND. The drains of the first group of transistors are linked to differential output lines (Vout) via two switches (KP, KP). Other two switches (KN, KN) connect the drains of the second group of transistors to the same lines. A differential input stage (12) is made up of two MOS transistors (MP1, MP2) and a current source (140.

公开(公告)号：AT479156T

公开(公告)日：2010-09-15

申请号：AT06808059

申请日：2006-09-01

Applicant: ST MICROELECTRONICS SA

Inventor： MANI CHRISTOPHE ,  DELL OVA FRANCIS ,  RIZZO PIERRE

IPC: G06K7/00 ,  G06K19/07

公开(公告)号：DE69623681D1

公开(公告)日：2002-10-24

申请号：DE69623681

申请日：1996-04-09

Applicant: ST MICROELECTRONICS SA

Inventor： DELL OVA FRANCIS ,  BONHOURE BRUNO ,  PAILLARDET FREDERIC

IPC: H03F1/56 ,  G05F3/26 ,  G11B7/00 ,  H03F3/08 ,  H03F3/34 ,  H03F3/345 ,  H03F3/347

Abstract: The amplifier includes a MOS transistor with its drain connected to an input terminal (A) which receives the current (I) to be amplified. The transistor gate (MN1) is connected to earth (GND) via a dc current source (14) which delivers a current I. A cascode transistor (MP1) is connected to the gate and drain of the first transistor. A constant voltage (Vc) is applied to the gate of the second transistor, while a second current source (16) delivers a current 2I to its source. A third transistor (MN2) is connected with its source and drain in parallel with the first transistor (MN1). The current collected at its output is amplified by a factor n which is determined by the surface ratio of the two transistors.

公开(公告)号：FR2806855A1

公开(公告)日：2001-09-28

申请号：FR0003606

申请日：2000-03-21

Applicant: ST MICROELECTRONICS SA

Inventor： RIZZO PIERRE ,  DELL OVA FRANCIS

IPC: H03D1/00 ,  G06K7/00 ,  G06K19/07 ,  H03D1/10 ,  H03K5/08 ,  H04L25/03 ,  H04L25/06 ,  H04L27/06 ,  H03D1/18

Abstract: The invention concerns a demodulator of an amplitude-modulated signal (Vdb), characterised in that it comprises a peak detecting cell (DCR) capable of extracting the reference modulating signal (Vpeak 1 ) of the modulated signal (Vdb); a first demodulator (FE) adapted to detect the peak of the reference modulating signal (Vpeak 1 ) to generate a high comparison threshold and locate the start of the modulation, a second demodulator (RE) adapted to detect a trough of the reference modulating signal (Vpeak 1 ) to generate a low comparison threshold and locate the end of the modulation; a logic processing unit capable of supplying the demodulated signal (Vdemod).