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公开(公告)号:DE602007004020D1
公开(公告)日:2010-02-11
申请号:DE602007004020
申请日:2007-05-29
Applicant: ST MICROELECTRONICS SA
Inventor: RICARD NICOLAS , MORO JEAN-LUC
IPC: H03K19/0185
Abstract: The device has a branch of series connected P and N channel transistors (P2, N4) with a medium point defining an output terminal (OUT). Control terminals of the transistors are respectively connected to high and low polarization potential application terminals (46, 45) by resistive elements (R2, R4). An output terminal (43) receiving inverse of a signal applied on an output terminal (44) is connected to each control terminal by capacitive elements (C2, C4). The terminal (43) is connected to the terminals (45, 46) by capacitive elements (C1, C3) in series with resistive elements (R1, R3).
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公开(公告)号:DE602007004370D1
公开(公告)日:2010-03-11
申请号:DE602007004370
申请日:2007-03-14
Applicant: ST MICROELECTRONICS SA
Inventor: GICQUEL HUGO , MORO JEAN-LUC , SABUT MARC
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