公开(公告)号：DE602004010589D1

公开(公告)日：2008-01-24

申请号：DE602004010589

申请日：2004-10-01

Applicant: ST MICROELECTRONICS SA

Inventor： DUPONT FRANCOIS ,  POVEDA PATRICK

IPC: H01L21/822 ,  H03H7/48 ,  H01L27/04

公开(公告)号：FR2889006A1

公开(公告)日：2007-01-26

申请号：FR0552276

申请日：2005-07-22

Applicant: ST MICROELECTRONICS SA

Inventor： POVEDA PATRICK ,  DUPONT FRANCOIS

IPC: H04B1/44

Abstract: L'invention concerne un commutateur (30) d'antenne (15) entre plusieurs voies d'émission et/ou de réception radiofréquence comportant, entre une borne commune (27) côté antenne et un condensateur (C1, C2, C3, C4, C5) d'accès propre à chaque voie, au moins une diode (D31, D32, D33, D34, D35), le nombre de diodes directement reliées à ladite borne commune étant impair et le nombre de diodes ayant leur cathode côté borne commune étant égal, à un près, au nombre de diodes ayant leur anode côté borne commune.

公开(公告)号：FR2847382A1

公开(公告)日：2004-05-21

申请号：FR0214460

申请日：2002-11-19

Applicant: ST MICROELECTRONICS SA

Inventor： POVEDA PATRICK

IPC: H01L21/308 ,  H01L21/334 ,  H01L21/762 ,  H01L21/302

Abstract: Narrow trench formation in silicon substrate comprises: (a) engraving to form first trenches separated by silicon ribs; (b) oxidation to form oxide layer to form second trenches and ribs; (c) filling second trenches; (d) engraving oxide to top of second ribs, retaining oxide between material fingers and ribs; (e) removing second ribs and material fingers; (f) oxide engraving to uncover substrate, retaining oxide fingers; (g) engraving substrate to form narrow trenches. Formation of narrow trenches in a silicon substrate (1) comprises: (a) engraving the substrate to form first trenches separated by first ribs of silicon; (b) thermal oxidation of the substrate to form a layer of silicon oxide around the substrate, in order to form some second trenches and some second ribs of silicon; (c) filling of the second trenches with some fingers of an engravable material; (d) engraving of the oxide up to the upper surface of the second ribs whilst conserving portions of the oxide between the fingers of material and the second ribs; (e) elimination of the second ribs of silicon and the fingers of material; (f) the engraving of the oxide to uncover the substrate at the bottom of the oxide portions, conserving the fingers of oxide; (g) engraving of the substrate to form narrow trenches in the substrate.

公开(公告)号：FR2829616A1

公开(公告)日：2003-03-14

申请号：FR0111680

申请日：2001-09-10

Applicant: ST MICROELECTRONICS SA

Inventor： COLLARD EMMANUEL ,  POVEDA PATRICK

IPC: H01L29/861 ,  H01L29/868 ,  H01L23/488

Abstract: A vertical diode with front face mounting and of low capacity in a semiconductor substrate (1) comprises: (a) a projecting first zone incorporating at least one semiconducting layer (3) doped with a conductivity type opposite to that of the substrate, the upper surface of the semiconducting layer carrying a first solder bead (23); and (b) a second zone incorporating on the substrate a thin conducting track (16) carrying at least two second solder beads (24). The first and second solder beads define a plane parallel to the plane of the substrate. An Independent claim is also included for the formation of a vertical diode with front face mounting and low capacity in a semiconductor substrate.

公开(公告)号：FR2864345B1

公开(公告)日：2006-03-31

申请号：FR0351110

申请日：2003-12-18

Applicant: ST MICROELECTRONICS SA

Inventor： POVEDA PATRICK

IPC: H01L29/872 ,  H01L21/329 ,  H01L29/06 ,  H01L29/40

Abstract: Formation of a component of the Trench MOS Barrier Schottky (TMBS) type of which the periphery is made up of a trench with insulated walls filled with a conductor, comprises: (a) depositing on a semiconductor substrate a thick layer (23) of a first insulating material and a thin layer (24) of a second material; (b) hollowing simultaneously a peripheral trench and the trenches (26) of the component; (c) isotropically engraving of the first material to leave a cap (29) overhanging a cavity (28); (d) forming a thin insulating layer (30); (e) filling the trenches and the cavity with a conducting material; (f) engraving the layer of conducting material and the thin insulating layer to uncover the surface of the semiconducting layer between two trenches and the cavity. Independent claims are also included for: (i) the formation of a Schottky diode; (ii) a component of the TMBS type.

公开(公告)号：FR2844921A1

公开(公告)日：2004-03-26

申请号：FR0211848

申请日：2002-09-25

Applicant: ST MICROELECTRONICS SA

Inventor： POVEDA PATRICK

IPC: H01L29/93 ,  H01L29/94 ,  H01L29/41 ,  H01G7/00

Abstract: The capacitance has an electrode (20) formed of all ribs protruding from a substrate, of portions of the substrate underlying the ribs and of portions of the substrate separating the bases of two ribs. Another electrode is superposed to one portion of the previous electrode, where the ribs are irregular in terms of planar base surface area. The ribs are arranged in quincunx.

公开(公告)号：FR2889006B1

公开(公告)日：2007-09-21

申请号：FR0552276

申请日：2005-07-22

Applicant: ST MICROELECTRONICS SA

Inventor： POVEDA PATRICK ,  DUPONT FRANCOIS

IPC: H04B1/44

Abstract: An antenna switch module between several radio-frequency transmit and/or receive paths including, between a common terminal on the antenna side and an access capacitor specific to each path, at least one diode, the number of diodes directly connected to the common terminal being odd and the number of diodes having their cathode on the common terminal side being equal, with a difference of one, to the number of diodes having their anode on the common terminal side.

公开(公告)号：FR2849538A1

公开(公告)日：2004-07-02

申请号：FR0216809

申请日：2002-12-27

Applicant: ST MICROELECTRONICS SA

Inventor： POVEDA PATRICK

IPC: H01L21/84 ,  H01L27/08 ,  H01L27/12 ,  H01L29/868

Abstract: An electric component comprising an assembly of two PIN diodes in series formed in a semiconductor substrate layer separated from a support layer by an insulating layer, the doped areas forming the electrodes of each diode having a depth equal to that of the substrate layer, the component including a first area of a first doping type surrounded with a second intrinsic area, itself surrounded with a third area of a second doping type, the third area being surrounded with a fourth area of the first doping type, the fourth area being surrounded with a fifth intrinsic area, itself surrounded with a sixth area of the second doping type, the third and fourth areas being covered and connected by a metal area, each of the first and sixth areas being connected to a contact pad on which rests a welding ball.

公开(公告)号：FR2914497B1

公开(公告)日：2009-06-12

申请号：FR0754221

申请日：2007-04-02

Applicant: ST MICROELECTRONICS SA

Inventor： SIMONNET JEAN MICHEL ,  LHORTE ANDRE ,  POVEDA PATRICK

IPC: H01L23/66

Abstract: A structure including at least two neighboring components, capable of operating at high frequencies, formed in a thin silicon substrate extending on a silicon support and separated therefrom by an insulating layer, the components being laterally separated by insulating regions. The silicon support has, at least in the vicinity of its portion in contact with the insulating layer, a resistivity greater than or equal to 1,000 ohms.cm.

公开(公告)号：FR2914497A1

公开(公告)日：2008-10-03

申请号：FR0754221

申请日：2007-04-02

Applicant: ST MICROELECTRONICS SA

Inventor： SIMONNET JEAN MICHEL ,  LHORTE ANDRE ,  POVEDA PATRICK

IPC: H01L23/66

Abstract: L'invention concerne une structure comprenant au moins deux composants voisins (D1, D2), susceptibles de fonctionner à des hautes fréquences, formés dans un substrat mince de silicium s'étendant sur un support de silicium (5) et séparé de celui-ci par une couche isolante (7), les composants (D1, D2) étant séparés latéralement par des régions isolantes (11). Le support de silicium (5) a, au moins au voisinage de sa partie en contact avec la couche isolante (7), une résistivité supérieure ou égale à 1000 ohms.cm.