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公开(公告)号:FR2881852B1
公开(公告)日:2007-04-13
申请号:FR0550367
申请日:2005-02-08
Applicant: ST MICROELECTRONICS SA , UNIV D AIX MARSEILLE I
Inventor: MALHERBE ALEXANDRE , KUSSENER EDITH , TELANDRO VINCENT
IPC: G06F1/00 , G06K19/073
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公开(公告)号:DE602006010452D1
公开(公告)日:2009-12-31
申请号:DE602006010452
申请日:2006-02-07
Applicant: ST MICROELECTRONICS SA , UNIV D AIX MARSEILLE I
Inventor: TELANDRO VINCENT , MALHERBE ALEXANDRE , KUSSENER EDITH
IPC: G06K19/073
Abstract: The circuit has a linear regulator (4`) for supplying a DC supply voltage (Vdd) to an internal load (29) from an external voltage (Vps). Chopper type capacitive clipping supply circuits (5), with switched capacitances, are in parallel with the activated linear regulator. The circuits supply current at the same time as the linear regulator, during an operation phase (D) of the integrated circuit which corresponds to a phase in which a calculating processor which contains the internal load is active.. An independent claim is also included for a method for scrambling the current signature of a load including an integrated circuit.
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公开(公告)号:DE602006010453D1
公开(公告)日:2009-12-31
申请号:DE602006010453
申请日:2006-02-07
Applicant: ST MICROELECTRONICS SA , UNIV D AIX MARSEILLE I
Inventor: TELANDRO VINCENT , MALHERBE ALEXANDRE , KUSSENER EDITH
IPC: G06K19/073
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公开(公告)号:FR2886426A1
公开(公告)日:2006-12-01
申请号:FR0551377
申请日:2005-05-25
Applicant: ST MICROELECTRONICS SA , UNIV D AIX MARSEILLE I
Inventor: KUSSENER EDITH , TELANDRO VINCENT , CHAILLAN FABIEN
IPC: G06F7/58
Abstract: L'invention concerne un procédé et un circuit de génération d'un flux numérique pseudoaléatoire comportant un oscillateur (2) à polarisation commandable par une source de polarisation analogique (5) commandée par un signal (Imod) à variations continues en amplitude et dans le temps.
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公开(公告)号:FR2881852A1
公开(公告)日:2006-08-11
申请号:FR0550367
申请日:2005-02-08
Applicant: ST MICROELECTRONICS SA , UNIV D AIX MARSEILLE I
Inventor: MALHERBE ALEXANDRE , KUSSENER EDITH , TELANDRO VINCENT
IPC: G06F1/00 , G06K19/073
Abstract: L'invention concerne un procédé et un circuit de brouillage de la signature en courant d'une charge (29) comportant au moins un circuit intégré exécutant des traitements numériques, consistant, au moins côté masse (22) de la charge, à combiner un courant (Issdc) absorbé par un premier régulateur linéaire (4") avec un courant (Issac) absorbé par au moins un circuit de découpage capacitif (5') à une ou plusieurs capacités commutées.
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公开(公告)号:FR2886426B1
公开(公告)日:2007-08-31
申请号:FR0551377
申请日:2005-05-25
Applicant: ST MICROELECTRONICS SA , UNIV D AIX MARSEILLE I
Inventor: KUSSENER EDITH , TELANDRO VINCENT , CHAILLAN FABIEN
IPC: G06F7/58
Abstract: The generator has an oscillator circuit (2) whose polarization is controlled by an analog polarization circuit (5). The circuit (5) is controlled by a continuous time and amplitude variation signal produced by a sample-and-hold circuit (63). An output signal of an analog signal generator (64) is sampled with pseudorandom instant by the circuit (63) at each time when an output signal of a pseudorandom signal source (61) crosses a threshold fixed by a detector (62) : An independent claim is also included for a method of controlling a pseudorandom number generator.
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