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公开(公告)号：DE69529828D1
公开(公告)日：2003-04-10
申请号：DE69529828
申请日：1995-11-30
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO , CLERICI GIANCARLO , BIETTI IVAN
Abstract: An operational amplifier (5) with adjustable frequency compensation comprises a transconductance input stage (2) and an amplifier output stage (3) connected serially together between an input terminal (IN) and an output terminal (OUT) of the operational amplifier. At least one compensation block (6) is connected across the input and the output of said output stage (3), According to the invention, the compensation block (6) comprises a plurality (N) of charge storage elements (CCn) connected in parallel together and in series to a switch block (7) which selectively connects a sub-plurality (N') of said charge storage elements (CCn) across the input and the output of said output stage (3) on the basis of an external signal (SEL) of the amplifier (5).
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公开(公告)号：DE69529908T2
公开(公告)日：2003-12-04
申请号：DE69529908
申请日：1995-11-30
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO , CLERICI GIANCARLO , BIETTI IVAN
Abstract: An operational amplifier frequency self-compensated with respect to closed-loop gain comprises a transconductance input stage (2) and an amplifier output stage (3) connected serially together to receive an input signal (Sin) on at least one input terminal (IN) of the amplifier and generate an amplified signal (Sout) on an output terminal (OUT) of the amplifier. Provided between the input (2) and output (3) stages is an intermediate node (S) which is connected to a compensation block (11) to receive a frequency-variable compensation signal (Sc) therefrom. According to the invention, the compensation block (11) is coupled with its input to the input terminal (IN) of the amplifier. The compensation block (11) is connected to receive at least the feedback signal (Sf). Preferably, the compensation signal (Sc) is variable as a function of a gain value (Gcl) which is determined by the feedback circuit, and said variation of the compensation signal occurs in a relationship of inverse proportionality to the gain value. This invention is useful in discrete circuits whose operational amplifier forms a device by itself, as well as in fully integrated circuits.
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公开(公告)号：DE69529401D1
公开(公告)日：2003-02-20
申请号：DE69529401
申请日：1995-05-22
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO , BIETTI IVAN , CLERICI GIANCARLO
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Patent Agency Ranking
公开(公告)号：DE69521197T2
公开(公告)日：2001-11-08
申请号：DE69521197
申请日：1995-04-11
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO , BIETTI IVAN , CLERICI GIANCARLO
Abstract: The speech circuit described matches the impedance of the telephone line by synthesizing a complex impedance by means of a positive feedback loop comprising a single resistor (11) and cancels out the side tone by means of a subtracter (20') which extracts from the signal (Va) coming from the line a signal (Vb) correlated to the signal to be transmitted. In order to achieve cancellation of the side tone unaffected by the noise produced in the circuits for synthesizing the impedance, the signal (Vb) correlated to the signal to be transmitted is derived by processing the signal present in the resistor (11) at the output of the feedback loop.
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公开(公告)号：DE69521197D1
公开(公告)日：2001-07-12
申请号：DE69521197
申请日：1995-04-11
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO , BIETTI IVAN , CLERICI GIANCARLO
Abstract: The speech circuit described matches the impedance of the telephone line by synthesizing a complex impedance by means of a positive feedback loop comprising a single resistor (11) and cancels out the side tone by means of a subtracter (20') which extracts from the signal (Va) coming from the line a signal (Vb) correlated to the signal to be transmitted. In order to achieve cancellation of the side tone unaffected by the noise produced in the circuits for synthesizing the impedance, the signal (Vb) correlated to the signal to be transmitted is derived by processing the signal present in the resistor (11) at the output of the feedback loop.
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公开(公告)号：DE69631772D1
公开(公告)日：2004-04-08
申请号：DE69631772
申请日：1996-12-04
Applicant: ST MICROELECTRONICS SRL
Inventor： REZZI FRANCESCO , CASTELLO RINALDO , CAZZANIGA MARCO , BIETTI IVAN
IPC: H03H11/04
Abstract: The invention relates to an elementary biquadratic cell for programmable time-continous analog filters, which is placed between a first supply voltage reference (Vdd) and a second voltage reference (GND) and is of a type having at least one pair of input terminals (I31,I31') and first (O31,O31') and second (O32,O32') pairs of output terminals, and having a pair of half-cells (31,31'), which half-cells are structurally identical with each other and each comprised of at least a first transistor (T31,T31') placed between the first (Vdd) and the second (GND) voltage reference and having a base terminal connected to a respective one of the input terminals (I31,I31'). Each half-cell (31,31') further comprises second (T32,T32') and third (T33,T33') transistors placed between the first (Vdd) and second (GND) voltage references, the second transistor (T32,T32') having a base terminal connected to the first output terminal (O31,O31') of the first pair of output terminals and a collector terminal connected to the second output terminal (O32,O32') of the second pair of output terminals, and the third transistor (T33,T33') having an emitter terminal connected to the first output terminal (O31,O31') of the first pair of output terminals ad a base terminal connected to the second output terminal (O32',O32) of the second pair of output terminals of the other half-cell.
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公开(公告)号：DE69530773D1
公开(公告)日：2003-06-18
申请号：DE69530773
申请日：1995-10-30
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO , CLERICI GIANCARLO , BIETTI IVAN
IPC: H03K17/06
Abstract: The interface circuit described is disposed between a generator (LG) of control signals (CS) and a plurality of electronic switches (SW) in order to produce boosted voltage signals (SCS) corresponding to the control signals (CS) for activating the electronic switches (SW). To avoid the use of capacitors with high capacitance and thus to save area of the integrated circuit, the circuit comprises a generator (SCK) of boosted-voltage clock signals ( phi , phi ) and a plurality of voltage multipliers (VM) each having an input connected to an output of the control signal generator (LG), an output connected to at least one terminal for activating an electronic switch (SW) and two control terminals connected to the boosted-voltage clock-signal generator.
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公开(公告)号：DE69529908D1
公开(公告)日：2003-04-17
申请号：DE69529908
申请日：1995-11-30
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO , CLERICI GIANCARLO , BIETTI IVAN
Abstract: An operational amplifier frequency self-compensated with respect to closed-loop gain comprises a transconductance input stage (2) and an amplifier output stage (3) connected serially together to receive an input signal (Sin) on at least one input terminal (IN) of the amplifier and generate an amplified signal (Sout) on an output terminal (OUT) of the amplifier. Provided between the input (2) and output (3) stages is an intermediate node (S) which is connected to a compensation block (11) to receive a frequency-variable compensation signal (Sc) therefrom. According to the invention, the compensation block (11) is coupled with its input to the input terminal (IN) of the amplifier. The compensation block (11) is connected to receive at least the feedback signal (Sf). Preferably, the compensation signal (Sc) is variable as a function of a gain value (Gcl) which is determined by the feedback circuit, and said variation of the compensation signal occurs in a relationship of inverse proportionality to the gain value. This invention is useful in discrete circuits whose operational amplifier forms a device by itself, as well as in fully integrated circuits.
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