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1.
公开(公告)号:JP2001285027A
公开(公告)日:2001-10-12
申请号:JP2001040561
申请日:2001-02-16
Applicant: ST MICROELECTRONICS SRL
Inventor: PISATI VALERIO , PORTALURI SALVATORE , CAZZANIGA MARCO , CASTELLO RINALDO
Abstract: PROBLEM TO BE SOLVED: To obtain a feedforward type circuit structure, having programmable zero which composes a time-continual filter, a delaychain, etc. SOLUTION: A couple of amplification cells (14, 15) are connected to each other at a node A and connected between a 1st signal (Vin) input IN of a 1st cell 14 and an output terminal U of a 2nd cell 15, and each cell is equipped with a couple of transistors (10, 2; 6, 7) which have a common conduction terminal and other conduction terminals coupled with a 1st voltage reference Vcc through respective bias members. Furthermore, a node X of the 1st cell 14 is connected to the output terminal U and a transistor 8 has a control terminal connected to a node X of the 1st cell 14, a 1st conduction terminal connected to an output terminal U, and a 2nd conduction terminal coupled with a 2nd voltage reference GND through a capacitor Cc. The transistor 8 is equipped with a circuit leg 13.
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公开(公告)号:JPH08130422A
公开(公告)日:1996-05-21
申请号:JP18343495
申请日:1995-06-26
Applicant: ST MICROELECTRONICS SRL
Inventor: CASTELLO RINALDO , BASCHIROTTO ANDREA , NAGARI ANGELO
Abstract: PURPOSE: To eliminate the loss of a charge and to hold a dynamic characteristic by stitching the output of the input switched operational amplifier structure of a switched capacitance circuit to supply voltage. CONSTITUTION: The output of the input switched operational amplifier structure of the switched capacitance circuit is switched to supply voltage Vdd instead of making it to a ground value. It is realized by using a private integrated P-channel switch in a substrate connected to supply voltage Vdd and what is called body effect is removed. Thus, the output node of the input operational amplifier A1 does not take negative voltage during an operation when the switched operational amplifier is turned off. For subtracting Vdd/2 voltage instead of adding them, a clock phase for driving two switches S2 and S3 connecting a bias capacitor Cdc to the supply node and ground is exchanged. Thus, the arbitrary loss through respective substrates can be prevented.
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公开(公告)号:JPH0846457A
公开(公告)日:1996-02-16
申请号:JP16656995
申请日:1995-06-30
Applicant: ST MICROELECTRONICS SRL
Inventor: REZZI FRANCESCO , BASCHIROTTO ANDREA , CASTELLO RINALDO
Abstract: PURPOSE: To suppress distortion generated by a transconductance by suppressing fluctuation of a load current and voltage. CONSTITUTION: The transconductor circuit consists of two input transistors M1 and M2 that are provided with a differential input and single output and the primary induction terminals D1, S1, D2 and S2 connected to one another so as to reduce the fluctuation of load current and voltage and at the same time to suppress the distortion generated by each of the transconductances as well.
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公开(公告)号:JPH0865064A
公开(公告)日:1996-03-08
申请号:JP19561095
申请日:1995-07-31
Applicant: ST MICROELECTRONICS SRL
Inventor: PISATI VALERIO , ALINI ROBERTO , CASTELLO RINALDO , VAI GIANFRANCO
Abstract: PROBLEM TO BE SOLVED: To control the gain of integrator with built-in transconductor by changing the output resistance of active load. SOLUTION: This device comprises a transconductance stage 3 having two input terminals I1 and I2 at least and two output terminals O1 and O2 at least and provided with an active load 4 connected to the output terminals O1 and O2 on the transconductance stage 3 and control circuit 5 for active load 4 connected between the output terminals O1 and O2 and the active load 4.
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公开(公告)号:JPH077572A
公开(公告)日:1995-01-10
申请号:JP25491793
申请日:1993-09-16
Applicant: ST MICROELECTRONICS SRL
Inventor: TOMASINI LUCIANO , CASTELLO RINALDO
IPC: H04M19/08
Abstract: PURPOSE: To divide a supply current among a plurality of functional circuits without causing wasteful use of the current by supplying the supply current to the first functional circuit having the highest priority by the amount which is absorbed by the circuit and the remaining quantity of current to the other circuits. CONSTITUTION: When an output stage O2 becomes active, a transistor(Tr) P1 is conducted and the whole current IL drawn from a line flows to the ground. When the current IL flows to the ground, the power supply to all functional circuits is only made by using the charges stored in their corresponding electricity storing capacitors. When an output O1 is active, on the other hand, the Tr P1 is turned on and the division of the line current IL among various supplies becomes possible. A control signal VCO generated from a block G makes the current which is the function of an offset current oscillator ICO to be supplied to the oscillator ICO. A Tr pair P1 and P2 divides a supply current which can be induced from a supply node E between the functional circuits A and B.
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公开(公告)号:JPH06276044A
公开(公告)日:1994-09-30
申请号:JP27355993
申请日:1993-11-01
Applicant: ST MICROELECTRONICS SRL
Inventor: TOMASINI LUCIANO , CASTELLO RINALDO
Abstract: PURPOSE: To provide an AC coupling circuit where all component elements are monolithically integrated. CONSTITUTION: A 1st capacitive element C1 is connected between an input terminal VIN and an output terminal VOUT, and a 2nd capacitive element C2 is connected in series to 1 1st resistive element R1. The elements C2 and R1 are connected in parallel to the element C1. Then a 3rd capacitive element C3 and a 2nd resistive element R2 are connected in parallel to each other between the terminal VOUT and a reference terminal VREF. In such a constitution, an A coupling circuit 10 is obtained.
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公开(公告)号:JPH06196948A
公开(公告)日:1994-07-15
申请号:JP21157793
申请日:1993-08-26
Applicant: ST MICROELECTRONICS SRL
Inventor: CASTELLO RINALDO , ALINI ROBERTO , REZZI FRANCESCO , PISATI VALERIO
Abstract: PURPOSE: To provide a mutual conductor stage for dealing with a high frequency signal. CONSTITUTION: A mutual conductor stage 1 has signal input parts A and B and signal output parts U1 and U2 and is provided with a pair of FET (M1 and M2 ) sharing gates G1 and G2 and sources S1 and S2 , and its output is composed of a pair of bipolar transistors Q1 and Q2 connected to these FET M1 and M2 .
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8.
公开(公告)号:JPH0846456A
公开(公告)日:1996-02-16
申请号:JP16656895
申请日:1995-06-30
Applicant: ST MICROELECTRONICS SRL
Inventor: REZZI FRANCESCO , BASCHIROTTO ANDREA , CASTELLO RINALDO
IPC: H03F3/45
Abstract: PURPOSE: To highly reduce common mode current signals in an output terminal. CONSTITUTION: The method for canceling common mode current signals at the second transconductor circuit C2 output terminals OP1 and OM1, which are provided with the same differential mode transconductance value as the second common mode conductance value is provided with a first transconductor circuit C1, and a second transconductor circuit C2. The circuit C1 is provided with the same differential mode transconductance value as the first common mode transconductance value. The circuit C2 is provided with the common mode transconductance whose coefficient is almost the same as the second value and whose code is opposite in parallel to the first transconductor circuit C1.
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公开(公告)号:JPH06244930A
公开(公告)日:1994-09-02
申请号:JP18150993
申请日:1993-07-22
Applicant: ST MICROELECTRONICS SRL
Inventor: TOMASINI LUCIANO , CASTELLO RINALDO , ERRATICO PIETRO
Abstract: PURPOSE: To synthesize impedance related with the circuit of a telephone subscriber connected with a pair-wire telephone line. CONSTITUTION: One precision resistor R is serially connected with a line 3, and this circuit is provided with at least one low-pass filter 8 and an amplifier 7 between the filter 8 and the resistor R. Thus, a terminal impedance can be synthesized with a balanced impedance by one outside precision element.
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公开(公告)号:JPH06224692A
公开(公告)日:1994-08-12
申请号:JP22898193
申请日:1993-09-14
Applicant: ST MICROELECTRONICS SRL
Inventor: TOMASINI LUCIANO , CASTELLO RINALDO
Abstract: PURPOSE: To integrate a capacitor in a circuit. CONSTITUTION: A circuit 1 is composed of a resistor Re connected in series with the first terminal L+ of a telephone line 3 and one set of current mirror circuits 4, 6, 8, and 10. The current mirror circuits 4, 6, 8, and 10 are connected to a first terminal in a closed loop and multiply the resistance value of the resistor Re by prescribed values when DC signals or signals having a very low frequency are inputted to a telephone subscriber's line 2.
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