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公开(公告)号：JP2001177349A
公开(公告)日：2001-06-29
申请号：JP2000321411
申请日：2000-10-20
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , GUINEA JESUS
IPC: H03K19/0944 , H03F1/30 , H03F3/30 , H03F3/343
Abstract: PROBLEM TO BE SOLVED: To obtain a circuit for compensating the difference between gate- source voltages of two MOS transistors of different types, caused by processing or a temperature change. SOLUTION: This circuit is provided characteristically with 1st and a 2nd transistors(TRs) Mp, Mn, 3rd and 4-th MOS TRs Mp1, Mn1 that are of the same type as that of the TRs Mp, Mn and formed in the same device, a means that biases the 3rd and 4-th Mp1, Mn1, a means consisting of Trs Mp4-Mp7 that measures a difference between the gate-source voltages of the 3rd and 4-th MOS TRs Mp1, Mn1, a means R1 that generates a compensation current I0 which is a function of the measured difference, and means S1-S3 and an Ro that use the compensation current I0 to change a bias of the 1st MOS TR Mp and the 2nd MOS TR Mn.
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公开(公告)号：JP2001168711A
公开(公告)日：2001-06-22
申请号：JP2000317034
申请日：2000-10-17
Applicant: ST MICROELECTRONICS SRL
Inventor： GUINEA JESUS , TOMASINI LUCIANO , MAGGIO SANTO
Abstract: PROBLEM TO BE SOLVED: To provide a delay locked loop circuit provided with a delay line provided with delay capable of being changed by a controlled method and a control circuit means for controlling the delay line so as to lock the delay line to a period T for delaying the periodic input signals of the period T. SOLUTION: The delay line 1 supplies plural delay cyclic signals CK1-CKN respectively delayed relating to the periodic input signals only for one part each of the delay. The control circuit means 2 and 7 are provided with a sequence detection circuit means 2 capable of periodically detecting the characteristic sequence of a digital value for indicating the delay by the delayed periodic signals and the delay Δt is reduced or increased so as to be locked to the period T corresponding to the type of the characteristic sequence.
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公开(公告)号：JP2001077798A
公开(公告)日：2001-03-23
申请号：JP2000238635
申请日：2000-08-07
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , GUINEA JESUS
Abstract: PROBLEM TO BE SOLVED: To solve the problem of interference between two clock signals by providing a first circuit means for supplying a local timing signal and a second circuit means suitable for deciding a repeating timing signal which is selected in advance and which nearly synchronized with the first flow of digital data. SOLUTION: A synchronizing means is provided with a first circuit means (delay fixing loop circuit) 8 and a second circuit means 6. The circuit 8 is supplied with a local timing signal CK in order to generate a plurality of repeating timing signals CK1-CKn, which start from the signal CK and are mutually delayed by the fraction of one period. The means 6 is supplied with the first flow (RX, RXEQ) of digital data and supplied with the signals CK1-CKn to be suited to deciding a repeating timing signal CKR which is selected in advance and which nearly synchronizes with the first flow (RX, RXEQ) of the digital data in the plurality of timing signals.
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公开(公告)号：JPH077572A
公开(公告)日：1995-01-10
申请号：JP25491793
申请日：1993-09-16
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO
IPC: H04M19/08
Abstract: PURPOSE: To divide a supply current among a plurality of functional circuits without causing wasteful use of the current by supplying the supply current to the first functional circuit having the highest priority by the amount which is absorbed by the circuit and the remaining quantity of current to the other circuits. CONSTITUTION: When an output stage O2 becomes active, a transistor(Tr) P1 is conducted and the whole current IL drawn from a line flows to the ground. When the current IL flows to the ground, the power supply to all functional circuits is only made by using the charges stored in their corresponding electricity storing capacitors. When an output O1 is active, on the other hand, the Tr P1 is turned on and the division of the line current IL among various supplies becomes possible. A control signal VCO generated from a block G makes the current which is the function of an offset current oscillator ICO to be supplied to the oscillator ICO. A Tr pair P1 and P2 divides a supply current which can be induced from a supply node E between the functional circuits A and B.
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公开(公告)号：JPH06276044A
公开(公告)日：1994-09-30
申请号：JP27355993
申请日：1993-11-01
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO
Abstract: PURPOSE: To provide an AC coupling circuit where all component elements are monolithically integrated. CONSTITUTION: A 1st capacitive element C1 is connected between an input terminal VIN and an output terminal VOUT, and a 2nd capacitive element C2 is connected in series to 1 1st resistive element R1. The elements C2 and R1 are connected in parallel to the element C1. Then a 3rd capacitive element C3 and a 2nd resistive element R2 are connected in parallel to each other between the terminal VOUT and a reference terminal VREF. In such a constitution, an A coupling circuit 10 is obtained.
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Patent Agency Ranking
公开(公告)号：JPH06244930A
公开(公告)日：1994-09-02
申请号：JP18150993
申请日：1993-07-22
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO , ERRATICO PIETRO
Abstract: PURPOSE: To synthesize impedance related with the circuit of a telephone subscriber connected with a pair-wire telephone line. CONSTITUTION: One precision resistor R is serially connected with a line 3, and this circuit is provided with at least one low-pass filter 8 and an amplifier 7 between the filter 8 and the resistor R. Thus, a terminal impedance can be synthesized with a balanced impedance by one outside precision element.
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公开(公告)号：JPH06224692A
公开(公告)日：1994-08-12
申请号：JP22898193
申请日：1993-09-14
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO
Abstract: PURPOSE: To integrate a capacitor in a circuit. CONSTITUTION: A circuit 1 is composed of a resistor Re connected in series with the first terminal L+ of a telephone line 3 and one set of current mirror circuits 4, 6, 8, and 10. The current mirror circuits 4, 6, 8, and 10 are connected to a first terminal in a closed loop and multiply the resistance value of the resistor Re by prescribed values when DC signals or signals having a very low frequency are inputted to a telephone subscriber's line 2.
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公开(公告)号：JPH06224689A
公开(公告)日：1994-08-12
申请号：JP18823293
申请日：1993-07-29
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO
Abstract: PURPOSE: To provide an inexpensive high-accuracy RC filter having structural and operational features suitable for integrated circuits requiring very large time constants. CONSTITUTION: An RC filter 1 is provided with a resistor R connected between the input Vin and output Vout of the filter and an amplifier 5 which is connected behind the resistor R and the output of which is fed back to its input through a capacitor. By using such a simple device, a filter having a large time constant while using small-sized components occupying small spaces in an integrated circuit can be manufactured by utilizing the already known mirror effect.
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公开(公告)号：JPH06216733A
公开(公告)日：1994-08-05
申请号：JP23338493
申请日：1993-09-20
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO , CONFALONIERI PIERANGELO
IPC: H03K17/06 , H03K17/687
Abstract: PURPOSE: To unnecessitate activation time until reaching an ordinary state by setting the clock cycle of output terminal at the maximum power voltage value from the beginning by composing a driver circuit for electronic switch of an input pin for impressing a clock signal and a voltage duplexer connected between this pin and a switch. CONSTITUTION: In this driver circuit 1 for an electronic switch 2, the switch 2 is operated corresponding to the clock signal at a prescribed frequency. The switch 2 is composed of an N channel MOS transistor M3, its gate terminal is connected to an output terminal 0 of circuit 1 and its drain terminal and source terminal are functioned as switch terminals. The circuit 1 is provided with a pair of FET M1 and M2, and their drain terminals D1 and D2 are also connected to the terminal 0 together. When operating the circuit 1 in such configuration, a phase F at an input pin B is made high, the phase F at a pin A is made low, in such a state, the gate/source voltage drop of transistor M1 is made equal with a power supply voltage Vdd, the M2 is not conducted and a capacitor C is turned into charged state.
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公开(公告)号：JPH05252320A
公开(公告)日：1993-09-28
申请号：JP27013592
申请日：1992-10-08
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI LUCIANO , CASTELLO RINALDO
Abstract: PURPOSE: To provide a circuit array which constitutes a speech circuit having extremely small voltage loss of a telephone line. CONSTITUTION: This array consists of an operational amplifier A, two resistors R1 and R2 connected between a telephone line and the input of the amplifier, 1st and 2nd FETs M1 and M2 connected to the output of the amplifier, 1st and 2nd bipolar transistors P1 and P2 which are controlled by the amplifier through the FETs, two current generators CC1 and CC2 , and a capacitor C connected to the collector terminal of the 2nd bipolar transistor, and the voltage of the telephone line is obtained as a stabilized voltage VS across the capacitor through the circuit array. Currents I1 and I2 from the generators and other electric physical quantities as circuit constants are so set that the 1st and 2nd bipolar transistors are turned off and on respectively when the voltage of the telephone line is smaller than a specific minimum value and on and off when not.
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