公开(公告)号：DE69516402T2

公开(公告)日：2000-11-02

申请号：DE69516402

申请日：1995-07-31

Applicant: ST MICROELECTRONICS SRL

Inventor： CALLIGARO CRISTIANO ,  DANIELE VINCENZO ,  GASTALDI ROBERTO ,  MANSTRETTA ALESSANDRO ,  TELECCO NICOLA ,  TORELLI GUIDO

IPC: G11C11/56

Abstract: A method for sensing multiple-levels non-volatile memory cells which can take one programming level among a plurality of m=2 (n > = 2) different programming levels, provides for biasing a memory cell (MC) to be sensed in a predetermined condition, so that the memory cell (MC) sinks a cell current (IC) with a value belonging to a discrete set of m distinct cell current values (IC0-IC15), each cell current value (IC0-IC15) corresponding to one of said programming levels. The sensing method also provides for: simultaneously comparing the cell current (IC) with a prescribed number of reference currents (IR1,IR2,IR3) having values comprised between a minimum value and a maximum value of said discrete set of m cell current values (IC0-IC15) and dividing said discrete set of m cell current values (IC0-IC15) in a plurality of sub-sets of cell current values, for determining the sub-set of cell current values to which the cell current (IC) belongs; repeating step a) for the sub-set of cell current values to which the cell current (IC) belongs, until the sub-set of cell current values to which the cell current (IC) belongs comprises only one cell current value, which is the value of the current (IC) of the memory cell (MC) to be sensed.

公开(公告)号：DE69514783T2

公开(公告)日：2000-06-08

申请号：DE69514783

申请日：1995-03-23

Applicant: ST MICROELECTRONICS SRL

Inventor： CALLIGARO CRISTIANO ,  DANIELE VINCENZO ,  GASTALDI ROBERTO ,  MANSTRETTA ALESSANDRO ,  TELECCO NICOLA ,  TORELLI GUIDO

IPC: G11C16/04 ,  G11C11/56 ,  G11C16/02 ,  G11C17/00

Abstract: A sensing circuit for serial dichotomic sensing of multiple-levels memory cells (MC) which can take one programming level among a plurality of m=2 (n >= 2) different programming levels, comprises biasing means for biasing a memory cell (MC) to be sensed in a predetermined condition, so that the memory cell (MC) sinks a cell current (IC) with a value belonging to a plurality of m distinct cell current values (IC0-IC3), each cell current value (IC0-IC3) corresponding to one of the programming levels, a current comparator (1) for comparing the cell current (IC) with a reference current (IR) generated by a variable reference current generator (G), and a successive approximation register (2) supplied with an output signal (CMP) of the current comparator (1) and controlling the variable reference current generator (G). The variable reference current generator comprises an offset current generator (Ioff) permanently coupled to the current comparator (1), and m-2 distinct current generators (IR0,IR1), independently activatable by the successive approximation register (2), each one generating a current (IC1,IC2) equal to a respective one of the plurality of cell current values (IC0-IC3).

公开(公告)号：DE69521051T2

公开(公告)日：2001-09-06

申请号：DE69521051

申请日：1995-12-29

Applicant: ST MICROELECTRONICS SRL

Inventor： DANIELE VINCENZO

IPC: H03K19/173 ,  H03K19/177 ,  G11C11/00

Abstract: A monolithically integrated programmable device having elementary modules connected electrically by means of memory cells of the flash type. which cells allow the signal paths between signal lines of the elementary modules to be programmed and re-programmed. Preferably, the flash memory cells are Fowler-Nordheim Effect cells.

公开(公告)号：DE69521051D1

公开(公告)日：2001-06-28

申请号：DE69521051

申请日：1995-12-29

Applicant: ST MICROELECTRONICS SRL

Inventor： DANIELE VINCENZO

IPC: H03K19/173 ,  H03K19/177 ,  G11C11/00

Abstract: A monolithically integrated programmable device having elementary modules connected electrically by means of memory cells of the flash type. which cells allow the signal paths between signal lines of the elementary modules to be programmed and re-programmed. Preferably, the flash memory cells are Fowler-Nordheim Effect cells.

公开(公告)号：DE69524558T2

公开(公告)日：2002-07-18

申请号：DE69524558

申请日：1995-01-27

Applicant: ST MICROELECTRONICS SRL

Inventor： CALLIGARO CRISTIANO ,  DANIELE VINCENZO ,  GASTALDI ROBERTO ,  MANSTRETTA ALESSANDRO ,  TORELLI GUIDO

IPC: G11C17/00 ,  G11C11/56 ,  G11C16/02

公开(公告)号：DE69524558D1

公开(公告)日：2002-01-24

申请号：DE69524558

申请日：1995-01-27

Applicant: ST MICROELECTRONICS SRL

Inventor： CALLIGARO CRISTIANO ,  DANIELE VINCENZO ,  GASTALDI ROBERTO ,  MANSTRETTA ALESSANDRO ,  TORELLI GUIDO

IPC: G11C17/00 ,  G11C11/56 ,  G11C16/02

公开(公告)号：DE69516402D1

公开(公告)日：2000-05-25

申请号：DE69516402

申请日：1995-07-31

Applicant: ST MICROELECTRONICS SRL

Inventor： CALLIGARO CRISTIANO ,  DANIELE VINCENZO ,  GASTALDI ROBERTO ,  MANSTRETTA ALESSANDRO ,  TELECCO NICOLA ,  TORELLI GUIDO

IPC: G11C11/56

Abstract: A method for sensing multiple-levels non-volatile memory cells which can take one programming level among a plurality of m=2 (n > = 2) different programming levels, provides for biasing a memory cell (MC) to be sensed in a predetermined condition, so that the memory cell (MC) sinks a cell current (IC) with a value belonging to a discrete set of m distinct cell current values (IC0-IC15), each cell current value (IC0-IC15) corresponding to one of said programming levels. The sensing method also provides for: simultaneously comparing the cell current (IC) with a prescribed number of reference currents (IR1,IR2,IR3) having values comprised between a minimum value and a maximum value of said discrete set of m cell current values (IC0-IC15) and dividing said discrete set of m cell current values (IC0-IC15) in a plurality of sub-sets of cell current values, for determining the sub-set of cell current values to which the cell current (IC) belongs; repeating step a) for the sub-set of cell current values to which the cell current (IC) belongs, until the sub-set of cell current values to which the cell current (IC) belongs comprises only one cell current value, which is the value of the current (IC) of the memory cell (MC) to be sensed.

公开(公告)号：DE69514783D1

公开(公告)日：2000-03-02

申请号：DE69514783

申请日：1995-03-23

Applicant: ST MICROELECTRONICS SRL

Inventor： CALLIGARO CRISTIANO ,  DANIELE VINCENZO ,  GASTALDI ROBERTO ,  MANSTRETTA ALESSANDRO ,  TELECCO NICOLA ,  TORELLI GUIDO

IPC: G11C16/04 ,  G11C11/56 ,  G11C16/02 ,  G11C17/00

Abstract: A sensing circuit for serial dichotomic sensing of multiple-levels memory cells (MC) which can take one programming level among a plurality of m=2 (n >= 2) different programming levels, comprises biasing means for biasing a memory cell (MC) to be sensed in a predetermined condition, so that the memory cell (MC) sinks a cell current (IC) with a value belonging to a plurality of m distinct cell current values (IC0-IC3), each cell current value (IC0-IC3) corresponding to one of the programming levels, a current comparator (1) for comparing the cell current (IC) with a reference current (IR) generated by a variable reference current generator (G), and a successive approximation register (2) supplied with an output signal (CMP) of the current comparator (1) and controlling the variable reference current generator (G). The variable reference current generator comprises an offset current generator (Ioff) permanently coupled to the current comparator (1), and m-2 distinct current generators (IR0,IR1), independently activatable by the successive approximation register (2), each one generating a current (IC1,IC2) equal to a respective one of the plurality of cell current values (IC0-IC3).