公开(公告)号：JPH11136099A

公开(公告)日：1999-05-21

申请号：JP24622998

申请日：1998-08-31

Applicant: ST MICROELECTRONICS SRL

Inventor： ROSSI ANNAMARIA ,  FUCILI GIONA ,  MARCELLO LEONE ,  NESSI MAURIZIO

IPC: H03K3/037 ,  H03K3/356

Abstract: PROBLEM TO BE SOLVED: To produce an XOR gate with use of a small number of transistors TR by connecting the output terminal of a flip-flop corresponding to the output terminal Q of a D type flip-flop to the gate terminal of a prescribed TR and also to a circuit node in a feedback way. SOLUTION: Only three TRs are used in addition to a TR consisting of a reference inverted input stage that is driven by the reference timing signals fi and Nfi (having non-superimposed phases). An XNOR input stage includes two TR M1 and M2 which are connected in series between an input terminal T and an output circuit node A via the source and drain terminals respectively. The gate terminal of the 1st TR M1 is connected to a node C, and the signal Nfi is applied to the gate terminal of the 2nd TR M2. Then a 3rd TR M3 is connected between a circuit power line Vdd and a circuit node B.