RESTRUCTURE FILTER
    1.
    发明专利

    公开(公告)号:JPH11154846A

    公开(公告)日:1999-06-08

    申请号:JP23985798

    申请日:1998-08-26

    Abstract: PROBLEM TO BE SOLVED: To relatively easily manufacture with high reliability at competitive cost by arranging a second capacitor which is feedback connected and a pair of additional resistors which are feedback connected between an output and an inverted input of an operational amplifier. SOLUTION: A first resistor R1 is connected in parallel to a 1st capacitor C1 and in a second resistor R2 , one end is connected toa common node of the resistor R1 and the capacitor C1 , and the other end is connected to an inverted input of an operational amplifier 3. A second capacitor C2 is connected between an output V0 of the amplifier 3 and the inverted input, and two resistors R3 A and R3 B are connected in parallel to the capacitor C2 . A current IDAC enters directly into a common node of the resistors R3 A and R3 B. The transfer function of this filter does not change, even in the case of this restructured filter that has a current input of (IDAC). Consequently, it is possible to obtain a restructured filter which has high area efficiency for a power driven digital-analog converter.

    DOUBLE SAMPLE TYPE SIGMADELTA MODULATOR FOR SECONDARY ORDER HAVING SEMI-DOUBLE PRIMARY ARCHITECTURE

    公开(公告)号:JPH11145838A

    公开(公告)日:1999-05-28

    申请号:JP25285098

    申请日:1998-09-07

    Abstract: PROBLEM TO BE SOLVED: To provide an improved secondary order double sample type analog/ digital (A/D) ΣΔ converter. SOLUTION: This secondary order double sample type A/D ΣΔconverter uses two pieces of cascade, connected to completely differential switched capacitor integrators. The first integrator has a completely floating double sample type semi-double switched capacitor input component, and the second integrator has a double sample type primary switched capacitor input component on the other hand, with superior SNR, capable of decreasing the number of switches and lowering the power consumption.

    RECEIVING SECTION OF TELEPHONE SYSTEM

    公开(公告)号:JP2000357975A

    公开(公告)日:2000-12-26

    申请号:JP2000138330

    申请日:2000-05-11

    Abstract: PROBLEM TO BE SOLVED: To prevent influence of improper audible noises which are generated by an electrical disturbance during transient period by adding a delay means to a controller, to generate the control signals to the 1st and 2nd enable/disable means in accordance with a prescribed control program and also to generate control signal of a switching means. SOLUTION: A processor 11 receives a demodulated digital signal RX-IN at its input side and supplies an analog signal, that is balanced between two outputs. The output of the processor 11 is connected to the input side of a differential amplifier 12 and then connected to one of input sides of the amplifier 12 through the resistances R1A and R1B connected in series to the MOS transistor M1A and M1B. An electroacoustic transducer 13 is connected between the output sides 15 and 16 of the amplifier 12. The processor 11 and the amplifier 12 have a circuit means to enable or disable a power supply in accordance with the signals which are applied to the corresponding enable terminals 17 and 18 respectively.

    ELECTRONIC SWITCH
    4.
    发明专利

    公开(公告)号:JPH0888551A

    公开(公告)日:1996-04-02

    申请号:JP4035295

    申请日:1995-02-28

    Abstract: PURPOSE: To enable satisfactory open/close operation in a simple structure by inserting 1st and 2nd circuit elements between two connecting terminals, and inserting a 3rd circuit element between a node between these circuit elements and a voltage reference point. CONSTITUTION: During a phase signal ϕ1 for closing a switch, two circuit elements SW1 and SW2 operate just as one passage transistor(Tr) exists. When opening the switch, a node C is connected to a voltage reference point VCM by conducting a circuit element SW3 according to a signal ϕ2 . When a node A is a high impedance node, a current lower than a threshold value flowing through the Tr of SW2 is forced to flow into the voltage reference point. The SW3 forcedly connects the node C to the reference potential point, surely reduces the gate-source voltage of a complementary Tr at the SW1 lower than a threshold voltage and completely insulates the node A.

    RECEIVER PART OF TELEPHONE SET
    5.
    发明专利

    公开(公告)号:JP2001068938A

    公开(公告)日:2001-03-16

    申请号:JP2000221032

    申请日:2000-07-21

    Abstract: PROBLEM TO BE SOLVED: To provide a receiver of a telephone set that can suppress noise even when one terminal of an electroacoustic transducer is connected to ground without the need for a filter element. SOLUTION: The receiver part of the telephone set is provided with a signal reception and demodulation device 10, a demodulation signal processing unit 11, an operational amplifier 16, an electroacoustic transducer 13, and a controller 20 of the operational amplifier 16, and also with capacitors C3, C4 connected between a 1st input and an output and between a 2nd input and the output of the operational amplifier 16, a capacitor C13 that is switchingly connected between reference voltage terminal pairs or between the 1st input and the output of the operational amplifier 16 with switches S1, S2 and a capacitor C2S that is switchingly connected between other reference voltage terminal pairs or between the 2nd input of the operational amplifier 16 and other reference voltage terminal with switches S3, S4. A switching means 15 connects the input terminals to a common terminal (RF0) for a period Δt after activation of a signal SW.

    ELECTRIC SWITCH FOR LOW VOLTAGE INTEGRATED POWER CIRCUIT

    公开(公告)号:JPH0865124A

    公开(公告)日:1996-03-08

    申请号:JP19462395

    申请日:1995-07-31

    Abstract: PROBLEM TO BE SOLVED: To provide an electronic switch with which no body effect occur by suitably connecting the substrate of complementary transistor to the maximum and minimum potential references of integrated circuit(IC). SOLUTION: Between connecting terminals A and B, the source and drain of 1st and 2nd P channel transistors M1 and M2 are serially inserted. A transistor M3 composed of (n) channels is connected to the node of M1 and M2 and between them, a minimum electric reference Vss of IC having the electronic switch is inserted. Besides, a transistor M4 composed of (n) channels is inserted between the terminals A and B of M1 and M2 through source and drain terminals, and the substrates of M1 and M2 are connected to the terminals A and B. The substrates of M3 and M4 are connected to the reference Vss as well and M4 is driven by the inverse of ϕ signal through a gate terminal but M1 and M2 are driven by an opposite signal ϕ. The inverse of ϕsignal is impressed to M3, which can be driven by the signal ϕthrough the terminals of M1 and M2 and inverters, and this reference is defined as a maximum voltage reference.

    INITIALIZING CIRCUIT
    7.
    发明专利

    公开(公告)号:JPH0856144A

    公开(公告)日:1996-02-27

    申请号:JP13085995

    申请日:1995-05-29

    Abstract: PURPOSE: To avoid the waste of power by setting the voltage of a circuit node B to be a zero value at the same time of setting the voltage of a circuit node A to be a supply power source voltage so as to make power consumption close to zero in a normal state. CONSTITUTION: When a supply power source voltage Vp is boosted, the voltage Va of the circuit node A is boosted to a value equal to the threshold value voltage Vt of a transistor(Tr)MN1 by time t2 . As resistance R1 is extremely high, at the additional and small boost of voltage δN, the node A is stabilized by the voltage value of Vn =Vt +δN. TrMP1 is maintained to be off until voltage between the voltage Vp and a gate terminal G3 reaches the conductive threshold value V of P-channel Tr. Though the boost of voltage δP at this point of time is small, negative impedance is added to the P-channel of TrMP1 to boost the voltage of the node B to the same value as Vp . Consequently, until the voltage Vp reaches a tripping threshold value VS, a voltage at the node B is zero In addition, as the result that a zero voltage value exists at the circuit node of a circuit part 4 at t1 , the voltage Vp exists on the gate terminal G2 of TrMN 2, voltage drop between a drain terminal D2 and the ground GND can be neglected.

    COMPLETELY DIFFERENTIAL FILTER FITTED WITH CHANGENER CAPACITOR USING CMOS OPERATION AMPLIFIER NOT HAVING COMMON MODE FEEDBACK

    公开(公告)号:JPH02219314A

    公开(公告)日:1990-08-31

    申请号:JP32747889

    申请日:1989-12-19

    Abstract: PURPOSE: To reduce an area, to reduce power consumption, and to improve a filtering ratio by providing a full differential arithmetic amplifier having two inputs and two outputs, and a pair of feedback circuit respectively having two capacitors and two switches. CONSTITUTION: Two outputs 6 of an arithmetic amplifier 1 are connected through a pair of feedback circuits 8 constituted of capacitors 10 selectively connected between the terminal of a polarization voltage Vp and the terminal of a reference voltage Vr according to the positions of a capacitor 9 and a pair of switches 11 with inputs 2. Then, when each switch 11 is connected with the capacitor 10 side, the capacitor 10 is properly charged with a voltage Vp -Vr and when each switch 11 is connected with the capacitor 9 side, the capacitor 10 is connected in parallel to the capacitor 9. Also, the amplifier 1 is formed of CMOS transistors Tr 13-16 in two systems, and the Tr 16 has a gate connected with each input 2, and an intermediate branch point between the Tr 14 and 15 is connected with each output 6. Thus, an area can be reduced, power consumption can be reduced, and a filtering ratio can be improved.

    RECEPTION SECTION FOR TELEPHONE SET

    公开(公告)号:JP2001016322A

    公开(公告)日:2001-01-19

    申请号:JP2000125357

    申请日:2000-04-26

    Abstract: PROBLEM TO BE SOLVED: To provide a final-stage amplifier and an electroacoustic, transducer whose one terminal is connected to a ground terminal to a reception section of a telephone set and to eliminate a filtering element without causing disturbances. SOLUTION: This reception section is provided with a final-stage amplifier 12, an electroacoustic transducer 13 with a 1st terminal connected to the ground point of the circuit of the reception section, a switch on/off control unit, a reference voltage power supply 30, a switch 21 that selects a 1st position or a 2nd position and selectively connects the 2nd terminal of the electroacoustic transducer 13 to a reference voltage terminal REF or an output terminal OUT of the final-stage amplifier 12 via a capacitor Cest, and a control means 20 that activates or inactivated the final stage amplifier 12 and the reference voltage source 30, in response to a signal PD of the switch on/off control unit and operates the switch 21 according to a prescribed time program. This reception section operates with immunity to disturbances similar to a completely balanced structure, even when the electroacoustic transducer 13 is not connected between two balanced output terminals.

    OUTPUT VOLTAGE STABILIZING CIRCUIT AND VOLTAGE MULTIPLIER USING IT

    公开(公告)号:JPH0898512A

    公开(公告)日:1996-04-12

    申请号:JP22351895

    申请日:1995-08-31

    Abstract: PROBLEM TO BE SOLVED: To stably maintain an output voltage and practically independent of a power supply voltage, a temperature, a process and within a certain limit, a load absorption current. SOLUTION: In an output voltage stabilization circuit which is composed of an input terminal IN, an output terminal OUT, a charge transmission capacitor C1 which takes out charges from the input terminal IN and transmits the charge to the output terminal OUT and an integrator, whose input is connected to the output terminal of a voltage multiplier and which generates a continuous voltage, corresponding to the difference between a reference voltage Vrif and the output voltage Vout of the voltage multiplier, the continuous voltage is supplied to one of the terminals of a charge transmission capacitor C1.

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