公开(公告)号：DE602005008396D1

公开(公告)日：2008-09-04

申请号：DE602005008396

申请日：2005-05-20

Applicant: ST MICROELECTRONICS SRL ,  HYNIX SEMICONDUCTOR INC

Inventor： RAGONE GIANCARLO ,  CRIPPA LUCA ,  SANGALLI MIRIAM ,  MICHELONI RINO

IPC: G11C8/08 ,  G11C16/08 ,  H02M3/07 ,  H03K17/06

Abstract: A high-voltage switch (24) has a high-voltage input terminal (29), receiving a high voltage (HV), and an output terminal (31). A pass transistor (36), having a control terminal, is connected between the high-voltage input terminal (29) and the output terminal (31). The output of a voltage-multiplying circuit (40) of the charge-pump type is connected to the control terminal. The voltage-multiplying circuit (40) is of a symmetrical type, has first and second charge-storage means (41, 42), receiving a clock signal (CK) of a periodic type, and has a first circuit branch (44, 48) and a second circuit branch (45, 49), which are symmetrical to one another and operate in phase opposition with respect to the clock signal (CK).

公开(公告)号：DE60226987D1

公开(公告)日：2008-07-17

申请号：DE60226987

申请日：2002-12-30

Applicant: ST MICROELECTRONICS SRL

Inventor： CRIPPA LUCA ,  RAGONE GIANCARLO

IPC: G11C16/10 ,  G11C11/56 ,  G11C16/12

Abstract: The present invention relates to a method and an electronic device for stabilising the voltage on the drain terminals of multilevel non volatile memory cells (3) in the programming step. In the method the application of said voltage is provided through a drain voltage regulator (2) having an output (OUT) connected to said terminals in a common circuit node (A) by means of a metal line (4) conduction path having a parasitic intrinsic resistance (Rpars). Advantageously, a feedback path (5) is provided between the node (A) and an input of the regulator (2).

公开(公告)号：ITRM20030512A1

公开(公告)日：2005-05-06

申请号：ITRM20030512

申请日：2003-11-05

Applicant: ST MICROELECTRONICS SRL

Inventor： KHOURI OSAMA ,  RAGONE GIANCARLO

IPC: G05F1/10 ,  H02M3/07 ,  H05K20060101