Method for patterning a wafer for the manufacture of an integrated circuit
    1.
    发明公开
    Method for patterning a wafer for the manufacture of an integrated circuit 审中-公开
    Verfahren zum Strukturieren eines Wafers zur Herstellung einer integrierten Schaltung

    公开(公告)号:EP1713119A2

    公开(公告)日:2006-10-18

    申请号:EP06007580.1

    申请日:2006-04-11

    CPC classification number: H01J37/32972 H01J37/32935 H01L21/31116

    Abstract: The present invention relates to a method for patterning a film of silicon nitride (14) landing over a silicon oxide substrate (12) for the manufacture of an integrated circuit. The method comprises the steps of:
    - etching at least one portion of a silicon nitride (14) surface with plasma (15) containing Cl 2 , BCl 3 and CHF 3 , whereby performing an etching reaction to define tapered trenches within the silicon nitride (14), wherein the plasma further comprises an inert gas which is indifferent in the etching reaction,
    - monitoring an infrared frequency emission signal (16) resulting from etching reaction products;
    - correlating a variation of the infrared frequency emission signal (16) with an etching across an interface area between the silicon nitride (14) and the silicon oxide substrate (12).

    Abstract translation: 本发明涉及一种用于图案化氮化硅膜(14)的方法,该氮化硅层叠在氧化硅衬底(12)上,用于制造集成电路。 该方法包括以下步骤: - 用包含Cl 2,BCl 3和CHF 3的等离子体(15)蚀刻氮化硅(14)表面的至少一部分,由此进行蚀刻反应以限定氮化硅内的锥形沟槽( 14),其中所述等离子体还包括在所述蚀刻反应中无差异的惰性气体, - 监测由蚀刻反应产物产生的红外频率发射信号(16); - 将红外线发射信号(16)的变化与氮化硅(14)和氧化硅衬底(12)之间的界面区域的蚀刻相关联。

    Method for patterning a wafer for the manufacture of an integrated circuit
    2.
    发明公开
    Method for patterning a wafer for the manufacture of an integrated circuit 审中-公开
    图案化的晶片用于制造集成电路的方法

    公开(公告)号:EP1713119A3

    公开(公告)日:2006-11-08

    申请号:EP06007580.1

    申请日:2006-04-11

    CPC classification number: H01J37/32972 H01J37/32935 H01L21/31116

    Abstract: The present invention relates to a method for patterning a film of silicon nitride (14) landing over a silicon oxide substrate (12) for the manufacture of an integrated circuit. The method comprises the steps of:
    - etching at least one portion of a silicon nitride (14) surface with plasma (15) containing Cl 2 , BCl 3 and CHF 3 , whereby performing an etching reaction to define tapered trenches within the silicon nitride (14), wherein the plasma further comprises an inert gas which is indifferent in the etching reaction,
    - monitoring an infrared frequency emission signal (16) resulting from etching reaction products;
    - correlating a variation of the infrared frequency emission signal (16) with an etching across an interface area between the silicon nitride (14) and the silicon oxide substrate (12).

    A method and apparatus for detecting a leak of external air into a plasma reactor
    3.
    发明公开
    A method and apparatus for detecting a leak of external air into a plasma reactor 审中-公开
    一种用于在等离子体反应器中通过泄漏检测Aussenlufteindringung方法和装置

    公开(公告)号:EP1394835A1

    公开(公告)日:2004-03-03

    申请号:EP02425536.6

    申请日:2002-08-29

    CPC classification number: H01J37/3244

    Abstract: A method (300) and a corresponding apparatus for detecting a leak of external air into a plasma reactor are proposed. The method of the invention includes the steps of: establishing (340) a plasma inside the reactor, the plasma having a composition suitable to generate at least one predetermined compound when reacting with the air, detecting (345) a light emission of the plasma, and analyzing (350-375) the light emission to identify the presence of the at least one predetermined compound.

    Abstract translation: 的方法(300),以及用于检测外部空气的漏入等离子体反应器中的相应设备的提议。 本发明的方法包括以下步骤:建立(340)一个反应器内的等离子体中,具有适合于产生至少一个预定的化合物当与空气反应生成的组合物的等离子体,检测(345)的等离子体的发光, 和分析(350-375)的光发射以识别至少一个预定的化合物的存在。

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