A SYSTEM FOR TESTING AN ELECTRONIC CIRCUIT COMPRISING A DIGITAL TO ANALOG CONVERTER AND CORRESPONDING METHOD AND COMPUTER PROGRAM PRODUCT

    公开(公告)号:EP4175181A1

    公开(公告)日:2023-05-03

    申请号:EP22200971.4

    申请日:2022-10-11

    Abstract: A system for testing comprising an electronic circuit to be tested (11; 11'; 11"; 11‴) and an automatic testing equipment (12; 12'),
    said electronic circuit (11; 11'; 11"; 11‴) to be tested comprises a digital to analog converter (111; 111';111"), comprising
    a set of electronic components (R; I), in particular arranged in a network, coupled to an analog reference voltage or to an analog reference current and
    a multiplexing network of switches (111b) coupled to said set of electronic components (R;I) and configured to select paths in said set of electronic components (R;I) on the basis of digital values (DC) at the input of said digital to analog converter (111; 111';111") supplied by a logic control module (112) comprised in said electronic circuit (11; 11'; 11"; 11‴),
    said electronic circuit (11; 11'; 11"; 11‴) to be tested comprising an input data link (113b, 123b) between the automatic testing equipment (20, 20', 20") and the logic control module (112),
    the system for testing being configured to perform a test of the set of electronic components (R;I) in which the automatic testing equipment (20, 20', 20") is configured to send digital data (TD) to control the logic module (112) inputting digital codes (DC) in the digital to analog converter (111; 111';111") and measuring the analog output of the digital to analog converter (111; 111';111") by a measuring instrument (122; 122') in said automatic testing equipment (12;12') coupled to an output (VDAC, Vin) of the electronic circuit (10, 10', 10‴), then checking if the measured values matches expected converted values for the given digital data (TD),
    wherein said test of the digital to analog converter (111; 111'; 111") comprises a further test of the multiplexing network of switches (111b) in which
    said logic module (112) is configured to execute a built-in test sequence (300) comprising supplying by said logic module (112) a sequence of digital codes (DC) forcing given switches of said multiplexing network of switches (111b) in a determined open or close state,
    said electronic circuit (11'; 11"; 11‴) comprising a feedback circuit (111d) to supply a feedback signal (FB) to said logic module (112), said logic module (112) being configured, on the basis of said feedback signal (FB), to control an execution flow of the built-in test sequence (300)) and to verify (324, 325) if the feedback signal (TB) matches an expected value for the corresponding digital code (DC) in the sequence of digital codes.

    SYSTEM BASIS CHIP, CORRESPONDING PROCESSING SYSTEM, DEVICE AND METHOD

    公开(公告)号:EP4156428A1

    公开(公告)日:2023-03-29

    申请号:EP22192315.4

    申请日:2022-08-26

    Abstract: A system basis chip (30a) is described. The system basis chip (30a) comprises a power supply circuit (300a) configured to receive an input voltage (V in ) and generate a plurality of voltages (V pre , V core , V I/O , V ext , V 1 , V 2 , V 3 ), and a control circuit (40).
    Specifically, the power supply circuit (300a) is configured to selectively switch on a first (Va) and a second (Vb) voltage of the voltages (V pre , V core , V I/O , V ext , V 1 , V 2 , V 3 ) as a function of a control signal (CTRL). The control circuit (40) measures a resistance value of an external resistor (R set ) connected to a terminal (340) and selects one of a plurality of configurations as a function of the measured resistance value, wherein a first configuration (CFG1) indicates that said first voltage (Va) should be switched on before said second voltage (Vb) and a second configuration (CFG2) indicates that said second voltage (Vb) should be switched on before said first voltage (Va). Accordingly, the control circuit (40) may generate the control signal (CTRL) in order to switch on in sequence the first (Va) and the second (Vb) voltage according to the selected configuration (CODE).

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