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公开(公告)号:EP4156428A1
公开(公告)日:2023-03-29
申请号:EP22192315.4
申请日:2022-08-26
Applicant: STMicroelectronics S.r.l.
Inventor: SOLE, Luigi , GAUDIANO, Rossella , CANTARINI, Marta , ERRICO, Nicola , GIORDANO, Antonio
IPC: H02J1/08
Abstract: A system basis chip (30a) is described. The system basis chip (30a) comprises a power supply circuit (300a) configured to receive an input voltage (V in ) and generate a plurality of voltages (V pre , V core , V I/O , V ext , V 1 , V 2 , V 3 ), and a control circuit (40).
Specifically, the power supply circuit (300a) is configured to selectively switch on a first (Va) and a second (Vb) voltage of the voltages (V pre , V core , V I/O , V ext , V 1 , V 2 , V 3 ) as a function of a control signal (CTRL). The control circuit (40) measures a resistance value of an external resistor (R set ) connected to a terminal (340) and selects one of a plurality of configurations as a function of the measured resistance value, wherein a first configuration (CFG1) indicates that said first voltage (Va) should be switched on before said second voltage (Vb) and a second configuration (CFG2) indicates that said second voltage (Vb) should be switched on before said first voltage (Va). Accordingly, the control circuit (40) may generate the control signal (CTRL) in order to switch on in sequence the first (Va) and the second (Vb) voltage according to the selected configuration (CODE).-
公开(公告)号:EP4254212A1
公开(公告)日:2023-10-04
申请号:EP23157086.2
申请日:2023-02-16
Applicant: STMicroelectronics S.r.l.
Inventor: CASTELLANO, Gerardo , GIORDANO, Antonio , RAIMONDI, Marcello
IPC: G06F13/42 , B60R21/0132
Abstract: A method to arm an airbag, the method including determining, by a system device (106), that an arming condition for the airbag has been met; delivering a communication to a master device (102) from the system device (106) to inform the master device (102) that the arming condition has been met; snooping the communication by an expansion device (106); and arming the airbag by the expansion device (106) in response to snooping the arming condition.
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公开(公告)号:EP4113244A1
公开(公告)日:2023-01-04
申请号:EP22179366.4
申请日:2022-06-16
Applicant: STMicroelectronics S.r.l.
Inventor: SOLE, Luigi , GIORDANO, Antonio
Abstract: System including a master device (2) including: a master oscillator (21,22) generating a first clock signal (MAIN_CLK_MASTER); a master timing stage (23) which implements a master counter (99) dependent on the first clock signal and generates a first local signal (TIMEBASE_MASTER) dependent on the master counter; and a master synchronization stage (24) which generates a synchronization signal (CLKSW) synchronous with the first local signal. The system further includes a slave device (4) including: a slave oscillator (41,42) generating a second clock signal (MAIN_CLK_SLAVE) frequency-locked with the first clock signal; a slave timing stage (43) which implements a slave counter (199) dependent on the second clock signal and generates a second local signal (TIMEBASE_SLAVE) dependent on the slave counter; and a slave synchronization stage (44,45) which reads, with a timing that depends on the synchronization signal, the value of the slave counter, compares the read value with an expected value and tunes the value of the slave counter according to the outcome of the comparison.
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公开(公告)号:EP4012865A1
公开(公告)日:2022-06-15
申请号:EP21209605.1
申请日:2021-11-22
Applicant: STMicroelectronics S.r.l.
Inventor: ERRICO, Nicola , GIORDANO, Antonio , PENNISI, Orazio , PEDONE, Leonardo , FINAZZI, Luca
IPC: H02H3/087
Abstract: An overcurrent (OVC) diagnostic circuit comprises comparator circuitry (200) configured to sense a current through a load (L) and compare the intensity of the current sensed with a comparison threshold which can be set to a first, lower threshold value (OVC_thr_1) and to a second, higher threshold value (OVC_thr_2). Logic circuitry (300) receives from the comparator circuitry (200) a comparison signal having a first value or a second value as a function of whether the current intensity is lower or higher than the comparison threshold (OVC_thr_1, OVC_thr_2). The logic circuitry (300) is configured (302) to set the comparison threshold of the comparator circuitry (200) alternately to the first threshold value (OVC_thr_1) and to the second threshold value (OVC_thr_2) and:
assert a first overcurrent event signal (OVC_1_Fault) in response to the comparison signal having the second value with the comparison threshold set to the first threshold value (OVC_thr_1) and the first value with the comparison threshold set to the second threshold value (OVC_thr_2),
assert a second overcurrent event signal (OVC_2_Fault) in response to the comparison signal having the second value both with the comparison threshold set to the first threshold value (OVC_thr_1) and with the comparison threshold set to the second threshold value (OVC_thr_2).
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