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    Driving circuit for memory device
    1.
    发明公开
    Driving circuit for memory device 有权
    TreiberschaltungfürSpeichervorrichtungen

    公开(公告)号：EP2383747A1

    公开(公告)日：2011-11-02

    申请号：EP11164292.2

    申请日：2011-04-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Castaldo, Enrico ,  Conte, Antonino ,  Lo Giudice, Gianbattista ,  Rinaldi, Stefania

    IPC: G11C16/12 ,  G11C16/30

    CPC classification number: G11C16/30 ,  G11C16/12

    Abstract: An electrically programmable non-volatile memory device (100) is proposed. The memory device includes a plurality of memory cells (110) and a driver circuit (115,120) for driving the memory cells (110); the driver circuit includes programming means (120) for providing a first programming voltage (VDs) to the drains and a second programming voltage (VSm) to the sources of a set of selected memory cells for programming the selected memory cells; the first programming voltage requires a first transient period (T 1 ) for reaching a first target value thereof. In the solution according to an embodiment of the present invention, the programming means includes means (605) for maintaining the second programming voltage substantially equal to the first programming voltage during a second transient period (T 2 ) being required by the second programming voltage to reach a second target value thereof, the two transient periods starting simultaneously.

    Abstract translation: 提出了一种电可编程非易失性存储器件（100）。 存储装置包括用于驱动存储单元（110）的多个存储单元（110）和驱动电路（115,120）。 所述驱动器电路包括用于向所述漏极提供第一编程电压（VDs）的编程装置（120）和用于对所选择的存储器单元进行编程的所选存储器单元的集合的源的第二编程电压（VSm）; 第一编程电压需要用于达到其第一目标值的第一瞬态周期（T 1）。 在根据本发明的实施例的解决方案中，编程装置包括用于在第二编程电压需要的第二瞬变周期（T 2）期间将第二编程电压基本上等于第一编程电压的装置（605） 达到第二个目标值，两个暂时期同时开始。

    An electrically modifiable, non-volatile, semiconductor memory which can keep a datum stored until an operation to modify the datum is completed
    2.
    发明公开
    An electrically modifiable, non-volatile, semiconductor memory which can keep a datum stored until an operation to modify the datum is completed 有权
    保持写入数据的电可修改非易失性半导体存储器，直到它们的重新编程完成

    公开(公告)号：EP1220229A1

    公开(公告)日：2002-07-03

    申请号：EP00830878.5

    申请日：2000-12-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Gastaldi, Roberto ,  Lo Giudice, Gianbattista ,  Pasotti, Marco ,  Pio, Federico

    IPC: G11C16/10

    CPC classification number: G11C16/102

    Abstract: An electrically-modifiable, non-volatile, semiconductor memory comprising a plurality of user memory locations which can be addressed individually from outside the memory in order to read and to modify user memory location, there is a corresponding pair of physical memory locations ((X1, Y1), (X2, Y2); WORDn) in the memory, which assume, alternatively, the functions of an active memory location and of a non-active memory location, the active memory location containing a previously-written datum and the non-active memory location being available for the writing of a new datum to replace the previously-written datum, so that, upon a request to replace the previous datum with the new datum, the previous datum is kept in the memory until the new datum has been written.

    Abstract translation: 的电可修改，非易失性半导体存储器包括可以单独地被寻址的存储器外，以便读取和修改用户的存储位置的用户存储器位置的复数，有一对相应的物理存储器位置（（X1 ，Y1），（X2，Y2）;在所述存储器中，其中假设，WORDn）可选地，有源存储器位置和一个非活性的存储器位置的功能，活性存储器位置包含先前写入的日期和非 -active存储单元是可用于新的日期的书面替换先前写的日期，使得在更换以前的日期与新日期的请求，先前的日期是保存在内存，直到新的日期有 被写入。

    Control integrated circuit of a charge pump
    4.
    发明公开
    Control integrated circuit of a charge pump 有权
    Integrierte Steuerschaltung einer Ladungspumpe

    公开(公告)号：EP1876600A1

    公开(公告)日：2008-01-09

    申请号：EP06425465.9

    申请日：2006-07-06

    Applicant: STMicroelectronics S.r.l.

    Inventor： Castaldo, Enrico ,  Conte, Antonino ,  Lo Giudice, Gianbattista

    IPC: G11C5/14 ,  H02M3/07

    CPC classification number: G11C5/145 ,  G11C16/12

    Abstract: There is disclosed an integrated control circuit (3) for a charge pump (1). The integrated circuit comprises a first device (112,N1,N2,R,12) suitable for regulating the output voltage (Vout) of the charge pump (1) and a second device (113,M10,M11,C11,11) suitable for increasing the output voltage (Vout) from the charge pump with a set ramp. The integrated circuit comprises means (111) suitable for activating said first device and providing it with a first value of a supply signal (Ireg) in a first period of time (A) and suitable for activating said second device and for providing it with a second value (Iramp) of the supply signal that is greater than the first value in a second period of time (C) after the first in such a way that the output voltage of the charge pump ascends a ramp from a first value (Vlow) to a second value (Vhigh) that is greater than the first value, said second value being fixed by the reactivation of the first device.

    Abstract translation: 公开了一种用于电荷泵（1）的集成控制电路（3）。 集成电路包括适合于调节电荷泵（1）的输出电压（Vout）的第一装置（112，N1，N2，R，12）和适合于所述电荷泵的第二装置（113，M10，M11，C11,11） 用于通过设定的斜坡增加来自电荷泵的输出电压（Vout）。 集成电路包括适于激活所述第一设备并且在第一时间段（A）中向其提供电源信号（Ireg）的第一值的装置（111），并且适于激活所述第二设备并为其提供 电源信号的第二值（Iramp）在第一次之后的第二时间段（C）中大于第一值，使得电荷泵的输出电压从第一值（Vlow）上升到斜坡， 到大于第一值的第二值（Vhigh），所述第二值通过第一设备的重新激活来固定。

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