Low-consumption regulator for a charge pump voltage generator
    2.
    发明公开
    Low-consumption regulator for a charge pump voltage generator 有权
    Verbrauchsarmer Reglerfüreine Spannungserzeugung mittels Ladungspumpe

    公开(公告)号:EP1492218A1

    公开(公告)日:2004-12-29

    申请号:EP03425404.5

    申请日:2003-06-24

    CPC classification number: H02M3/073

    Abstract: A regulator circuit for a charge pump voltage generator comprises a voltage comparator means (400) for performing a voltage comparison between a charge pump output voltage (Vout) and a reference voltage (Vbg), and means (425) responsive to the voltage comparator means for conditioning a charge pump clocking to the result of the voltage comparison. The voltage comparator means includes sampling means (C3,C4,SW3-SW5,SMP) for sampling the charge pump output voltage at a sampling rate. Sampling rate control means (410,415) are provided, responsive to the voltage comparison, for controlling the sampling rate according to the result of the voltage comparison.

    Abstract translation: 电路具有用于比较电荷泵输出电压和参考电压的电压比较器(400)。 时钟控制(425)基于比较结果来调节电荷泵时钟。 比较器具有采样单元,用于以采样率对电荷泵输出电压进行采样。 分频器(415)和频率选择状态机(410)基于电压比较结果来控制采样率。 还包括以下独立权利要求:(a)包括电荷泵电压发生器和电荷泵调节器电路的集成电路(b)调节电荷泵电压发生器的输出电压的方法。

    Driving circuit for memory device
    3.
    发明公开
    Driving circuit for memory device 有权
    TreiberschaltungfürSpeichervorrichtungen

    公开(公告)号:EP2383747A1

    公开(公告)日:2011-11-02

    申请号:EP11164292.2

    申请日:2011-04-29

    CPC classification number: G11C16/30 G11C16/12

    Abstract: An electrically programmable non-volatile memory device (100) is proposed. The memory device includes a plurality of memory cells (110) and a driver circuit (115,120) for driving the memory cells (110); the driver circuit includes programming means (120) for providing a first programming voltage (VDs) to the drains and a second programming voltage (VSm) to the sources of a set of selected memory cells for programming the selected memory cells; the first programming voltage requires a first transient period (T 1 ) for reaching a first target value thereof. In the solution according to an embodiment of the present invention, the programming means includes means (605) for maintaining the second programming voltage substantially equal to the first programming voltage during a second transient period (T 2 ) being required by the second programming voltage to reach a second target value thereof, the two transient periods starting simultaneously.

    Abstract translation: 提出了一种电可编程非易失性存储器件(100)。 存储装置包括用于驱动存储单元(110)的多个存储单元(110)和驱动电路(115,120)。 所述驱动器电路包括用于向所述漏极提供第一编程电压(VDs)的编程装置(120)和用于对所选择的存储器单元进行编程的所选存储器单元的集合的源的第二编程电压(VSm); 第一编程电压需要用于达到其第一目标值的第一瞬态周期(T 1)。 在根据本发明的实施例的解决方案中,编程装置包括用于在第二编程电压需要的第二瞬变周期(T 2)期间将第二编程电压基本上等于第一编程电压的装置(605) 达到第二个目标值,两个暂时期同时开始。

    Control integrated circuit of a charge pump
    5.
    发明公开
    Control integrated circuit of a charge pump 有权
    Integrierte Steuerschaltung einer Ladungspumpe

    公开(公告)号:EP1876600A1

    公开(公告)日:2008-01-09

    申请号:EP06425465.9

    申请日:2006-07-06

    CPC classification number: G11C5/145 G11C16/12

    Abstract: There is disclosed an integrated control circuit (3) for a charge pump (1). The integrated circuit comprises a first device (112,N1,N2,R,12) suitable for regulating the output voltage (Vout) of the charge pump (1) and a second device (113,M10,M11,C11,11) suitable for increasing the output voltage (Vout) from the charge pump with a set ramp. The integrated circuit comprises means (111) suitable for activating said first device and providing it with a first value of a supply signal (Ireg) in a first period of time (A) and suitable for activating said second device and for providing it with a second value (Iramp) of the supply signal that is greater than the first value in a second period of time (C) after the first in such a way that the output voltage of the charge pump ascends a ramp from a first value (Vlow) to a second value (Vhigh) that is greater than the first value, said second value being fixed by the reactivation of the first device.

    Abstract translation: 公开了一种用于电荷泵(1)的集成控制电路(3)。 集成电路包括适合于调节电荷泵(1)的输出电压(Vout)的第一装置(112,N1,N2,R,12)和适合于所述电荷泵的第二装置(113,M10,M11,C11,11) 用于通过设定的斜坡增加来自电荷泵的输出电压(Vout)。 集成电路包括适于激活所述第一设备并且在第一时间段(A)中向其提供电源信号(Ireg)的第一值的装置(111),并且适于激活所述第二设备并为其提供 电源信号的第二值(Iramp)在第一次之后的第二时间段(C)中大于第一值,使得电荷泵的输出电压从第一值(Vlow)上升到斜坡, 到大于第一值的第二值(Vhigh),所述第二值通过第一设备的重新激活来固定。

    Discharge circuit for a word-erasable flash memory device
    8.
    发明公开
    Discharge circuit for a word-erasable flash memory device 有权
    Entladeschaltungfüreinen wortweiselöschbarenFlash-Speicher

    公开(公告)号:EP1727153A1

    公开(公告)日:2006-11-29

    申请号:EP05104465.9

    申请日:2005-05-25

    CPC classification number: G11C16/16

    Abstract: A non-volatile memory device is proposed. The memory device (100) includes a plurality of blocks (115) of memory cells (125), each block having a common biasing node (SL) for all the memory cells of the block, biasing means (150) for providing a biasing voltage, and selection means (140, 145) for selectively applying the biasing voltage to the biasing node of a selected block, for each block the selection means including first switching means (N8, N9, N10) and second switching means (N7) connected in series, the first switching means being connected with the biasing node and the second switching means being connected with the biasing means, wherein the second switching means of all the blocks are connected in parallel, the selection means including means (145) for closing the first switching means of the selected block and the second switching means of all the blocks, and for opening the second switching means of each unselected block.

    Abstract translation: 提出了一种非易失性存储器件。 存储器件(100)包括存储器单元(125)的多个块(115),每个块具有用于块的所有存储单元的公共偏置节点(SL),偏置装置(150)用于提供偏置电压 以及用于选择性地将偏置电压施加到所选块的偏置节点的选择装置(140,145),对于每个块,选择装置包括第一开关装置(N8,N9,N10)和第二开关装置(N7) 所述第一开关装置与所述偏置节点连接,所述第二开关装置与所述偏置装置连接,其中所述块的所述第二开关装置并联连接,所述选择装置包括用于闭合所述第一开关装置的装置, 所有块的切换装置和所有块的第二切换装置,并且用于打开每个未选择块的第二切换装置。

    A power management unit for a flash memory with single regulation of multiple charge pumps
    9.
    发明公开
    A power management unit for a flash memory with single regulation of multiple charge pumps 有权
    对于具有几个电荷泵的共同调节的闪速存储器的电源管理单元

    公开(公告)号:EP1566723A1

    公开(公告)日:2005-08-24

    申请号:EP04100682.6

    申请日:2004-02-20

    CPC classification number: G06F1/26 G11C16/30

    Abstract: A power management unit (115) for a non-volatile memory device (100) is proposed. The power management unit includes means (125) for providing a reference voltage, resistive means (Rr) for deriving a reference current from the reference voltage, means (135 1 -135 n ) for generating a plurality of operative voltages from a power supply voltage, and means (145 1 -145 n ) for regulating the operative voltages; in the power management unit of the invention, for each operative voltage the means for regulating includes means (220) for deriving a scaled reference current from the reference current according to a scaling factor, further resistive means (245 i ) for deriving a rating voltage from the scaled reference current, means (220,245 i ) for deriving a measuring voltage from the operative voltage and the rating voltage, and means (250 i ) for controlling the operative voltage according to a comparison between the measuring voltage and the reference voltage.

    Abstract translation: 一种功率管理单元(115),用于非易失性存储器装置(100)被提议。 功率管理单元包括用于从参考电压导出的参考电流的装置(1351-135n),用于从电源电压产生工作电压的多元化提供参考电压,电阻装置(RR)手段(125),和 装置(1451-145n),用于调节所述工作电压; 在本发明的功率管理单元,对于每个操作电压的装置,用于调节包括​​用于从所述基准电流雅丁缩放参考电流的缩放因子,另外电阻装置(245I),用于从导出的评价电压的装置(220) 缩放的参考电流的装置(220,245i),用于从所述操作电压和额定电压的测量电压的装置,以及(250I),用于控制工作电压gemäß到测量电压和所述基准电压之间的比较。

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